[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1617766086-5502-2-git-send-email-flora.fu@mediatek.com>
Date: Wed, 7 Apr 2021 11:27:59 +0800
From: Flora Fu <flora.fu@...iatek.com>
To: Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
CC: Flora Fu <flora.fu@...iatek.com>,
Pi-Cheng Chen <pi-cheng.chen@...iatek.com>,
Chiawen Lee <chiawen.lee@...iatek.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>, <linux-clk@...r.kernel.org>
Subject: [PATCH 1/8] dt-bindings: clock: Add MT8192 APU clock bindings
Add clock bindings for APU on MT8192.
Signed-off-by: Flora Fu <flora.fu@...iatek.com>
---
include/dt-bindings/clock/mt8192-clk.h | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/dt-bindings/clock/mt8192-clk.h b/include/dt-bindings/clock/mt8192-clk.h
index ece5b4c0356c..71e07858f5dc 100644
--- a/include/dt-bindings/clock/mt8192-clk.h
+++ b/include/dt-bindings/clock/mt8192-clk.h
@@ -164,7 +164,15 @@
#define CLK_TOP_APLL12_DIV9 152
#define CLK_TOP_SSUSB_TOP_REF 153
#define CLK_TOP_SSUSB_PHY_REF 154
-#define CLK_TOP_NR_CLK 155
+#define CLK_TOP_DSP_SEL 155
+#define CLK_TOP_DSP1_SEL 156
+#define CLK_TOP_DSP1_NPUPLL_SEL 157
+#define CLK_TOP_DSP2_SEL 158
+#define CLK_TOP_DSP2_NPUPLL_SEL 159
+#define CLK_TOP_DSP5_SEL 160
+#define CLK_TOP_DSP5_APUPLL_SEL 161
+#define CLK_TOP_IPU_IF_SEL 162
+#define CLK_TOP_NR_CLK 163
/* INFRACFG */
@@ -309,7 +317,9 @@
#define CLK_APMIXED_APLL1 8
#define CLK_APMIXED_APLL2 9
#define CLK_APMIXED_MIPID26M 10
-#define CLK_APMIXED_NR_CLK 11
+#define CLK_APMIXED_APUPLL 11
+#define CLK_APMIXED_NPUPLL 12
+#define CLK_APMIXED_NR_CLK 13
/* SCP_ADSP */
--
2.18.0
Powered by blists - more mailing lists