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Message-ID: <6d74a0eb5c1b1dd21ece0520e2c96f1b83df15c8.1617776878.git.pavle.rohalj@gmail.com>
Date: Tue, 6 Apr 2021 23:36:14 -0700
From: Pavle Rohalj <pavle.rohalj@...il.com>
To: sudipm.mukherjee@...il.com, teddy.wang@...iconmotion.com,
gregkh@...uxfoundation.org, linux-fbdev@...r.kernel.org,
linux-staging@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: [PATCH v2 07/49] staging: sm750fb: Update programModeRegisters to
snake case
Fix "Avoid CamelCase" checkpatch.pl check for the function
programModeRegisters, including its name, parameters, and body.
Signed-off-by: Pavle Rohalj <pavle.rohalj@...il.com>
---
drivers/staging/sm750fb/ddk750_mode.c | 48 +++++++++++++--------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index 2fae81b47f46..5c685b4e2fd6 100644
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c
@@ -75,7 +75,7 @@ display_control_adjust_sm750le(struct mode_parameter *mode_param,
}
/* only timing related registers will be programed */
-static int programModeRegisters(struct mode_parameter *pModeParam,
+static int program_mode_registers(struct mode_parameter *mode_param,
struct pll_value *pll)
{
int ret = 0;
@@ -86,46 +86,46 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
/* programe secondary pixel clock */
poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll));
- tmp = ((pModeParam->horizontal_total - 1) <<
+ tmp = ((mode_param->horizontal_total - 1) <<
CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) &
CRT_HORIZONTAL_TOTAL_TOTAL_MASK;
- tmp |= (pModeParam->horizontal_display_end - 1) &
+ tmp |= (mode_param->horizontal_display_end - 1) &
CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK;
poke32(CRT_HORIZONTAL_TOTAL, tmp);
- tmp = (pModeParam->horizontal_sync_width <<
+ tmp = (mode_param->horizontal_sync_width <<
CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) &
CRT_HORIZONTAL_SYNC_WIDTH_MASK;
- tmp |= (pModeParam->horizontal_sync_start - 1) &
+ tmp |= (mode_param->horizontal_sync_start - 1) &
CRT_HORIZONTAL_SYNC_START_MASK;
poke32(CRT_HORIZONTAL_SYNC, tmp);
- tmp = ((pModeParam->vertical_total - 1) <<
+ tmp = ((mode_param->vertical_total - 1) <<
CRT_VERTICAL_TOTAL_TOTAL_SHIFT) &
CRT_VERTICAL_TOTAL_TOTAL_MASK;
- tmp |= (pModeParam->vertical_display_end - 1) &
+ tmp |= (mode_param->vertical_display_end - 1) &
CRT_VERTICAL_TOTAL_DISPLAY_END_MASK;
poke32(CRT_VERTICAL_TOTAL, tmp);
- tmp = ((pModeParam->vertical_sync_height <<
+ tmp = ((mode_param->vertical_sync_height <<
CRT_VERTICAL_SYNC_HEIGHT_SHIFT)) &
CRT_VERTICAL_SYNC_HEIGHT_MASK;
- tmp |= (pModeParam->vertical_sync_start - 1) &
+ tmp |= (mode_param->vertical_sync_start - 1) &
CRT_VERTICAL_SYNC_START_MASK;
poke32(CRT_VERTICAL_SYNC, tmp);
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
- if (pModeParam->vertical_sync_polarity)
+ if (mode_param->vertical_sync_polarity)
tmp |= DISPLAY_CTRL_VSYNC_PHASE;
- if (pModeParam->horizontal_sync_polarity)
+ if (mode_param->horizontal_sync_polarity)
tmp |= DISPLAY_CTRL_HSYNC_PHASE;
if (sm750_get_chip_type() == SM750LE) {
- display_control_adjust_sm750le(pModeParam, tmp);
+ display_control_adjust_sm750le(mode_param, tmp);
} else {
reg = peek32(CRT_DISPLAY_CTRL) &
~(DISPLAY_CTRL_VSYNC_PHASE |
@@ -140,40 +140,40 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
poke32(PANEL_PLL_CTRL, sm750_format_pll_reg(pll));
- reg = ((pModeParam->horizontal_total - 1) <<
+ reg = ((mode_param->horizontal_total - 1) <<
PANEL_HORIZONTAL_TOTAL_TOTAL_SHIFT) &
PANEL_HORIZONTAL_TOTAL_TOTAL_MASK;
- reg |= ((pModeParam->horizontal_display_end - 1) &
+ reg |= ((mode_param->horizontal_display_end - 1) &
PANEL_HORIZONTAL_TOTAL_DISPLAY_END_MASK);
poke32(PANEL_HORIZONTAL_TOTAL, reg);
poke32(PANEL_HORIZONTAL_SYNC,
- ((pModeParam->horizontal_sync_width <<
+ ((mode_param->horizontal_sync_width <<
PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) &
PANEL_HORIZONTAL_SYNC_WIDTH_MASK) |
- ((pModeParam->horizontal_sync_start - 1) &
+ ((mode_param->horizontal_sync_start - 1) &
PANEL_HORIZONTAL_SYNC_START_MASK));
poke32(PANEL_VERTICAL_TOTAL,
- (((pModeParam->vertical_total - 1) <<
+ (((mode_param->vertical_total - 1) <<
PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) &
PANEL_VERTICAL_TOTAL_TOTAL_MASK) |
- ((pModeParam->vertical_display_end - 1) &
+ ((mode_param->vertical_display_end - 1) &
PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK));
poke32(PANEL_VERTICAL_SYNC,
- ((pModeParam->vertical_sync_height <<
+ ((mode_param->vertical_sync_height <<
PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) &
PANEL_VERTICAL_SYNC_HEIGHT_MASK) |
- ((pModeParam->vertical_sync_start - 1) &
+ ((mode_param->vertical_sync_start - 1) &
PANEL_VERTICAL_SYNC_START_MASK));
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
- if (pModeParam->vertical_sync_polarity)
+ if (mode_param->vertical_sync_polarity)
tmp |= DISPLAY_CTRL_VSYNC_PHASE;
- if (pModeParam->horizontal_sync_polarity)
+ if (mode_param->horizontal_sync_polarity)
tmp |= DISPLAY_CTRL_HSYNC_PHASE;
- if (pModeParam->clock_phase_polarity)
+ if (mode_param->clock_phase_polarity)
tmp |= DISPLAY_CTRL_CLOCK_PHASE;
reserved = PANEL_DISPLAY_CTRL_RESERVED_MASK |
@@ -220,6 +220,6 @@ int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock)
outb_p(0x88, 0x3d4);
outb_p(0x06, 0x3d5);
}
- programModeRegisters(parm, &pll);
+ program_mode_registers(parm, &pll);
return 0;
}
--
2.30.2
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