lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20210408181553.jlqsq664av2vs65u@mpHalley.localdomain>
Date:   Thu, 8 Apr 2021 20:15:53 +0200
From:   Javier González <javier.gonz@...sung.com>
To:     Christoph Hellwig <hch@....de>
CC:     Keith Busch <kbusch@...nel.org>,
        Dmitry Monakhov <dmtrmonakhov@...dex-team.ru>,
        <linux-kernel@...r.kernel.org>, <linux-nvme@...ts.infradead.org>,
        <Chaitanya.Kulkarni@....com>
Subject: Re: [PATCH 1/1] nvme-pci: add the DISABLE_WRITE_ZEROES quirk for a
 Samsung PM1725a

On 08.04.2021 14:15, Christoph Hellwig wrote:
>On Thu, Apr 08, 2021 at 12:30:16PM +0200, Javier González wrote:
>>>> Aligning to MDTS is our current behavior, although all kernels up to
>>>> 5.11 had a bug in the calculation.
>>>
>>> I see. Let me check internally and see what's going on with
>>> write-zeroes on this model.
>>
>> We still need to confirm, but it seems like MDTS for write-zeroes is
>> reported wrong in the FW that Dmitry is using. We can at least reproduce
>> it.
>>
>> Would it be a possibility to add quirk infrastructure to hardcode MDTS
>> for FW versions prior TP4040?
>>
>> Another possibility is to add quirks to the TP4040 support patches to
>> enable this - it might also help reduce the list of models currently
>> blacklisted for write-zeroes.
>
>I'm not sure I understand you.  Before TP4040 there is only the MDTS,
>which only applies to data transfer commands, although we also
>"volunarily" apply it to Write Zeroes.  If MDTS is wrong this would
>also affect normal I/O, so we really either need a firmware update
>or a quirk.  Or is the Write Zeroes limit even smaller than MTDS?

The latter. The Write Zeroes limit is smaller than MDTS.

>I'd rather not add another quirk with a specific limit in that case,
>as well grow way too many of those.

This is what I had in mind - a structure with the quirks that would set
the write zeroes limit for the cases prior to TP4040 and where this is
lower than MDTS. But fair enough; I can see how painful it can be to
maintain this.

>TP4040 is the way to go for that case.

I agree TP4040 is the way to move forward.

Here I have one question: How do you envision adding support for FW
updates that add TP4040 support (or fix MDTS) with regards with existing
quirks.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ