linux-kernel - Re: [OpenRISC] [PATCH v6 1/9] locking/qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS

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Message-ID: <1199af5f-275a-5812-fc73-f1d33449036b@redhat.com>
Date:   Thu, 8 Apr 2021 15:00:59 -0400
From:   Waiman Long <longman@...hat.com>
To:     Stafford Horne <shorne@...il.com>,
        Boqun Feng <boqun.feng@...il.com>
Cc:     guoren@...nel.org, linux-arch@...r.kernel.org,
        linux-xtensa@...ux-xtensa.org, Guo Ren <guoren@...ux.alibaba.com>,
        Arnd Bergmann <arnd@...db.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Will Deacon <will@...nel.org>, linux-kernel@...r.kernel.org,
        linux-csky@...r.kernel.org, openrisc@...ts.librecores.org,
        Anup Patel <anup@...infault.org>, sparclinux@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linuxppc-dev@...ts.ozlabs.org,
        Ingo Molnar <mingo@...hat.com>
Subject: Re: [OpenRISC] [PATCH v6 1/9] locking/qspinlock: Add
 ARCH_USE_QUEUED_SPINLOCKS_XCHG32

On 4/6/21 7:52 PM, Stafford Horne wrote:
>
> For OpenRISC I did ack the patch to convert to
> CONFIG_ARCH_USE_QUEUED_SPINLOCKS_XCHG32=y.  But I think you are right, the
> generic code in xchg_tail and the xchg16 emulation code in produced by OpenRISC
> using xchg32 would produce very similar code.  I have not compared instructions,
> but it does seem like duplicate functionality.
>
> Why doesn't RISC-V add the xchg16 emulation code similar to OpenRISC?  For
> OpenRISC we added xchg16 and xchg8 emulation code to enable qspinlocks.  So
> one thought is with CONFIG_ARCH_USE_QUEUED_SPINLOCKS_XCHG32=y, can we remove our
> xchg16/xchg8 emulation code?

For the record, the latest qspinlock code doesn't use xchg8 anymore. It 
still need xchg16, though.

Cheers,
Longman