[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20210408103016.5girhv5ctkucovmd@mpHalley.local>
Date: Thu, 8 Apr 2021 12:30:16 +0200
From: Javier González <javier.gonz@...sung.com>
To: Christoph Hellwig <hch@....de>
CC: Keith Busch <kbusch@...nel.org>,
Dmitry Monakhov <dmtrmonakhov@...dex-team.ru>,
<linux-kernel@...r.kernel.org>, <linux-nvme@...ts.infradead.org>,
<Chaitanya.Kulkarni@....com>
Subject: Re: [PATCH 1/1] nvme-pci: add the DISABLE_WRITE_ZEROES quirk for a
Samsung PM1725a
On 23.03.2021 13:43, Javier González wrote:
>On 23.03.2021 13:31, Christoph Hellwig wrote:
>>On Tue, Mar 23, 2021 at 09:37:49AM +0100, Javier González wrote:
>>>Quick question. It seems like the current quirk simply disables
>>>write-zeroes. Would you be open for a quirk that aligns with MDTS for
>>>models that implemented it this way before TP4040?
>>
>>Aligning to MDTS is our current behavior, although all kernels up to
>>5.11 had a bug in the calculation.
>
>I see. Let me check internally and see what's going on with
>write-zeroes on this model.
We still need to confirm, but it seems like MDTS for write-zeroes is
reported wrong in the FW that Dmitry is using. We can at least reproduce
it.
Would it be a possibility to add quirk infrastructure to hardcode MDTS
for FW versions prior TP4040?
Another possibility is to add quirks to the TP4040 support patches to
enable this - it might also help reduce the list of models currently
blacklisted for write-zeroes.
Powered by blists - more mailing lists