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Message-ID: <1617990965-35337-5-git-send-email-radhey.shyam.pandey@xilinx.com>
Date: Fri, 9 Apr 2021 23:26:02 +0530
From: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
To: <vkoul@...nel.org>, <robh+dt@...nel.org>, <michal.simek@...inx.com>
CC: <dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <git@...inx.com>,
Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
Subject: [RFC v2 PATCH 4/7] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count
Increase AXI DMA transaction segments count to ensure that even in
high load we always get a free segment in prepare descriptor for a
DMA_SLAVE transaction.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
---
Changes for v2:
- None
---
drivers/dma/xilinx/xilinx_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 14dcfc473e52..890bf46b36e5 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -178,7 +178,7 @@
#define XILINX_DMA_BD_SOP BIT(27)
#define XILINX_DMA_BD_EOP BIT(26)
#define XILINX_DMA_COALESCE_MAX 255
-#define XILINX_DMA_NUM_DESCS 255
+#define XILINX_DMA_NUM_DESCS 512
#define XILINX_DMA_NUM_APP_WORDS 5
/* AXI CDMA Specific Registers/Offsets */
--
2.7.4
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