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Message-ID: <b8182434-b7b0-ef59-ef15-f84687df94df@gmail.com>
Date:   Fri, 9 Apr 2021 11:15:37 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Ansuel Smith <ansuelsmth@...il.com>, Andrew Lunn <andrew@...n.ch>
Cc:     Vivien Didelot <vivien.didelot@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] drivers: net: dsa: qca8k: add support for multiple
 cpu port



On 4/5/2021 10:16 PM, Ansuel Smith wrote:
> On Wed, Apr 07, 2021 at 02:41:02AM +0200, Andrew Lunn wrote:
>> On Tue, Apr 06, 2021 at 06:50:40AM +0200, Ansuel Smith wrote:
>>> qca8k 83xx switch have 2 cpu ports. Rework the driver to support
>>> multiple cpu port. All ports can access both cpu ports by default as
>>> they support the same features.
>>
>> Do you have more information about how this actually works. How does
>> the switch decide which port to use when sending a frame towards the
>> CPU? Is there some sort of load balancing?
>>
>> How does Linux decide which CPU port to use towards the switch?
>>
>>     Andrew
> 
> I could be very wrong, but in the current dsa code, only the very first
> cpu port is used and linux use only that to send data.

That is correct, the first CPU port that is detected by the parsing
logic gets used.

> In theory the switch send the frame to both CPU, I'm currently testing a
> multi-cpu patch for dsa and I can confirm that with the proposed code
> the packets are transmitted correctly and the 2 cpu ports are used.
> (The original code has one cpu dedicated to LAN ports and one cpu
> dedicated to the unique WAN port.) Anyway in the current implementation
> nothing will change. DSA code still supports one cpu and this change
> would only allow packet to be received and trasmitted from the second
> cpu.

That use case seems to be the most common which makes sense since it
allows for true Gigabit routing between WAN and LAN by utilizing both
CPUs's Ethernet controllers.

How do you currently assign a port of a switch with a particular CPU
port this is presumably done through a separate patch that you have not
submitted?
-- 
Florian

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