[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <161796404906.29796.17104382917045246922.tip-bot2@tip-bot2>
Date: Fri, 09 Apr 2021 10:27:29 -0000
From: "tip-bot2 for Wolfram Sang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Wolfram Sang <wsa+renesas@...g-engineering.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
niklas.soderlund+renesas@...natech.se,
Daniel Lezcano <daniel.lezcano@...aro.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: timers/core] dt-bindings: timer: renesas,cmt: Add r8a779a0 CMT support
The following commit has been merged into the timers/core branch of tip:
Commit-ID: fe8324f37cfebf72e2669e97b9d76ea9794d2972
Gitweb: https://git.kernel.org/tip/fe8324f37cfebf72e2669e97b9d76ea9794d2972
Author: Wolfram Sang <wsa+renesas@...g-engineering.com>
AuthorDate: Thu, 11 Mar 2021 10:09:18 +01:00
Committer: Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Thu, 08 Apr 2021 13:23:23 +02:00
dt-bindings: timer: renesas,cmt: Add r8a779a0 CMT support
Signed-off-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Link: https://lore.kernel.org/r/20210311090918.2197-1-wsa+renesas@sang-engineering.com
---
Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
index 428db3a..363ec28 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
@@ -79,6 +79,7 @@ properties:
- renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H
- renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3
- renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3
+ - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U
- const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2
- items:
@@ -94,6 +95,7 @@ properties:
- renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H
- renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3
- renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3
+ - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U
- const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2
reg:
Powered by blists - more mailing lists