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Message-Id: <20210410111356.467340-4-jbrunet@baylibre.com>
Date: Sat, 10 Apr 2021 13:13:54 +0200
From: Jerome Brunet <jbrunet@...libre.com>
To: Mark Brown <broonie@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>
Cc: Jerome Brunet <jbrunet@...libre.com>, alsa-devel@...a-project.org,
linux-kernel@...r.kernel.org, Stephen Boyd <sboyd@...nel.org>
Subject: [PATCH 3/5] ASoC: rt5682: clock driver must use the clock provider API
Clock drivers ops should not the clk API but the clock provider (clk_hw)
instead.
Signed-off-by: Jerome Brunet <jbrunet@...libre.com>
---
sound/soc/codecs/rt5682.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c
index 0e2a10ed11da..2eee02ac8d49 100644
--- a/sound/soc/codecs/rt5682.c
+++ b/sound/soc/codecs/rt5682.c
@@ -2634,7 +2634,7 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
container_of(hw, struct rt5682_priv,
dai_clks_hw[RT5682_DAI_WCLK_IDX]);
struct snd_soc_component *component = rt5682->component;
- struct clk *parent_clk;
+ struct clk_hw *parent_hw;
const char * const clk_name = clk_hw_get_name(hw);
int pre_div;
unsigned int clk_pll2_out;
@@ -2649,8 +2649,8 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
*
* It will set the codec anyway by assuming mclk is 48MHz.
*/
- parent_clk = clk_get_parent(hw->clk);
- if (!parent_clk)
+ parent_hw = clk_hw_get_parent(hw);
+ if (!parent_hw)
dev_warn(component->dev,
"Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n",
CLK_PLL2_FIN);
--
2.30.2
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