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Message-ID: <20210412152511.igvdfilnuv6ed6hi@two.firstfloor.org>
Date:   Mon, 12 Apr 2021 08:25:12 -0700
From:   Andi Kleen <andi@...stfloor.org>
To:     "Liuxiangdong (Aven, Cloud Infrastructure Service Product Dept.)" 
        <liuxiangdong5@...wei.com>
Cc:     Like Xu <like.xu@...ux.intel.com>, andi@...stfloor.org,
        "Fangyi (Eric)" <eric.fangyi@...wei.com>,
        Xiexiangyou <xiexiangyou@...wei.com>, kan.liang@...ux.intel.com,
        kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
        wei.w.wang@...el.com, x86@...nel.org,
        "Xu, Like" <like.xu@...el.com>
Subject: Re: [PATCH v4 01/16] perf/x86/intel: Add x86_pmu.pebs_vmx for Ice
 Lake Servers

> The reason why soft lockup happens may be the unmapped EPT pages. So, do we
> have a way to map all gpa
> before we use pebs on Skylake?

Can you configure a VT-d device, that will implicitly pin all pages for the
IOMMU. I *think* that should be enough for testing.

-Andi

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