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Message-ID: <1618241456-27200-6-git-send-email-bpeled@marvell.com>
Date: Mon, 12 Apr 2021 18:30:56 +0300
From: <bpeled@...vell.com>
To: <thomas.petazzoni@...tlin.com>, <lorenzo.pieralisi@....com>,
<bhelgaas@...gle.com>
CC: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<sebastian.hesselbarth@...il.com>, <gregory.clement@...tlin.com>,
<andrew@...n.ch>, <robh+dt@...nel.org>, <mw@...ihalf.com>,
<jaz@...ihalf.com>, <kostap@...vell.com>, <nadavh@...vell.com>,
<stefanc@...vell.com>, <oferh@...vell.com>, <bpeled@...vell.com>
Subject: [”PATCH” 5/5] PCI: armada8k: add device reset to link-down handle
From: Ben Peled <bpeled@...vell.com>
Added pcie reset via gpio support as described in the
designware-pcie.txt DT binding document.
In cases link down cause still exist in device.
The device need to be reset to reestablish the link.
If reset-gpio pin provided in the device tree, then the linkdown
handle resets the device before reestablishing link.
Signed-off-by: Ben Peled <bpeled@...vell.com>
---
drivers/pci/controller/dwc/pcie-armada8k.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c
index 4eb8607..83ac91e 100644
--- a/drivers/pci/controller/dwc/pcie-armada8k.c
+++ b/drivers/pci/controller/dwc/pcie-armada8k.c
@@ -24,6 +24,7 @@
#include <linux/of_irq.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
+#include <linux/of_gpio.h>
#include "pcie-designware.h"
@@ -38,6 +39,7 @@ struct armada8k_pcie {
struct regmap *sysctrl_base;
u32 mac_rest_bitmask;
struct work_struct recover_link_work;
+ enum of_gpio_flags flags;
};
#define PCIE_VENDOR_REGS_OFFSET 0x8000
--
2.7.4
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