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Message-ID: <20210412160216.GA3970458@robh.at.kernel.org>
Date:   Mon, 12 Apr 2021 11:02:16 -0500
From:   Rob Herring <robh@...nel.org>
To:     Claudiu Beznea <claudiu.beznea@...rochip.com>
Cc:     nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com,
        ludovic.desroches@...rochip.com, linux@...linux.org.uk,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 16/24] dt-bindings: atmel-sysreg: add bindings for
 sama7g5

On Fri, Apr 09, 2021 at 02:13:37PM +0300, Claudiu Beznea wrote:
> Add RAM controller and RAM PHY controller DT bindings.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---
>  .../devicetree/bindings/arm/atmel-sysregs.txt     | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index 807264a78edc..7cd55a760d41 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -45,7 +45,8 @@ RAMC SDRAM/DDR Controller required properties:
>  			"atmel,at91sam9260-sdramc",
>  			"atmel,at91sam9g45-ddramc",
>  			"atmel,sama5d3-ddramc",
> -			"microchip,sam9x60-ddramc"
> +			"microchip,sam9x60-ddramc",
> +			"microchip,sama7g5-uddrc"
>  - reg: Should contain registers location and length
>  
>  Examples:
> @@ -55,6 +56,18 @@ Examples:
>  		reg = <0xffffe800 0x200>;
>  	};
>  
> +RAMC PHY Controller required properties:
> +- compatible: Should be "microchip,sama7g5-ddr3phy", "syscon"
> +- reg: Should contain registers location and length
> +
> +Example:
> +
> +	ddr3phy: ddr3phy@...04000 {
> +		compatible = "microchip,sama7g5-ddr3phy", "syscon";
> +		reg = <0xe3804000 0x1000>;
> +		status = "okay";

Really need an example for this? If so, drop 'status'.

> +};
> +
>  SHDWC Shutdown Controller
>  
>  required properties:
> -- 
> 2.25.1
> 

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