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Message-Id: <20210412223617.8634-2-jbx6244@gmail.com>
Date: Tue, 13 Apr 2021 00:36:16 +0200
From: Johan Jonker <jbx6244@...il.com>
To: heiko@...ech.de
Cc: robh+dt@...nel.org, linus.walleij@...aro.org,
bgolaszewski@...libre.com, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/3] ARM: dts: rockchip: change gpio nodenames
Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.
Signed-off-by: Johan Jonker <jbx6244@...il.com>
---
arch/arm/boot/dts/rk3036.dtsi | 6 +++---
arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------
arch/arm/boot/dts/rk3188.dtsi | 8 ++++----
arch/arm/boot/dts/rk322x.dtsi | 8 ++++----
arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++---------
arch/arm/boot/dts/rv1108.dtsi | 8 ++++----
6 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index e24230d50..33ddede4b 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -505,7 +505,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@...7c000 {
+ gpio0: gpio@...7c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
@@ -518,7 +518,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@...80000 {
+ gpio1: gpio@...80000 {
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -531,7 +531,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@...84000 {
+ gpio2: gpio@...84000 {
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 252750c97..cf3ea32e5 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -297,7 +297,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@...34000 {
+ gpio0: gpio@...34000 {
compatible = "rockchip,gpio-bank";
reg = <0x20034000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
@@ -310,7 +310,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@...3c000 {
+ gpio1: gpio@...3c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
@@ -323,7 +323,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@...3e000 {
+ gpio2: gpio@...3e000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
@@ -336,7 +336,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@...80000 {
+ gpio3: gpio@...80000 {
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -349,7 +349,7 @@
#interrupt-cells = <2>;
};
- gpio4: gpio4@...84000 {
+ gpio4: gpio@...84000 {
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
@@ -362,7 +362,7 @@
#interrupt-cells = <2>;
};
- gpio6: gpio6@...0a000 {
+ gpio6: gpio@...0a000 {
compatible = "rockchip,gpio-bank";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 2298a8d84..08aac5452 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -247,7 +247,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@...0a000 {
+ gpio0: gpio@...0a000 {
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
@@ -260,7 +260,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@...3c000 {
+ gpio1: gpio@...3c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
@@ -273,7 +273,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@...3e000 {
+ gpio2: gpio@...3e000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
@@ -286,7 +286,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@...80000 {
+ gpio3: gpio@...80000 {
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 118d96424..d9ac1d08c 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -823,7 +823,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@...10000 {
+ gpio0: gpio@...10000 {
compatible = "rockchip,gpio-bank";
reg = <0x11110000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
@@ -836,7 +836,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@...20000 {
+ gpio1: gpio@...20000 {
compatible = "rockchip,gpio-bank";
reg = <0x11120000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
@@ -849,7 +849,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@...30000 {
+ gpio2: gpio@...30000 {
compatible = "rockchip,gpio-bank";
reg = <0x11130000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
@@ -862,7 +862,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@...40000 {
+ gpio3: gpio@...40000 {
compatible = "rockchip,gpio-bank";
reg = <0x11140000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 05557ad02..e96a70ebe 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1424,7 +1424,7 @@
#size-cells = <2>;
ranges;
- gpio0: gpio0@...50000 {
+ gpio0: gpio@...50000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
@@ -1437,7 +1437,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@...80000 {
+ gpio1: gpio@...80000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
@@ -1450,7 +1450,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@...90000 {
+ gpio2: gpio@...90000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -1463,7 +1463,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@...a0000 {
+ gpio3: gpio@...a0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -1476,7 +1476,7 @@
#interrupt-cells = <2>;
};
- gpio4: gpio4@...b0000 {
+ gpio4: gpio@...b0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -1489,7 +1489,7 @@
#interrupt-cells = <2>;
};
- gpio5: gpio5@...c0000 {
+ gpio5: gpio@...c0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -1502,7 +1502,7 @@
#interrupt-cells = <2>;
};
- gpio6: gpio6@...d0000 {
+ gpio6: gpio@...d0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@@ -1515,7 +1515,7 @@
#interrupt-cells = <2>;
};
- gpio7: gpio7@...e0000 {
+ gpio7: gpio@...e0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
@@ -1528,7 +1528,7 @@
#interrupt-cells = <2>;
};
- gpio8: gpio8@...f0000 {
+ gpio8: gpio@...f0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 68e2282f7..3ace88e8c 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -582,7 +582,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@...30000 {
+ gpio0: gpio@...30000 {
compatible = "rockchip,gpio-bank";
reg = <0x20030000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
@@ -595,7 +595,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@...10000 {
+ gpio1: gpio@...10000 {
compatible = "rockchip,gpio-bank";
reg = <0x10310000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
@@ -608,7 +608,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@...20000 {
+ gpio2: gpio@...20000 {
compatible = "rockchip,gpio-bank";
reg = <0x10320000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
@@ -621,7 +621,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@...30000 {
+ gpio3: gpio@...30000 {
compatible = "rockchip,gpio-bank";
reg = <0x10330000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
--
2.11.0
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