lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1618217183.16010.4.camel@mtksdaap41>
Date:   Mon, 12 Apr 2021 16:46:23 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     Yongqiang Niu <yongqiang.niu@...iatek.com>
CC:     Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        <devicetree@...r.kernel.org>, David Airlie <airlied@...ux.ie>,
        <linux-kernel@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        <linux-mediatek@...ts.infradead.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v1] drm/mediatek: adjust rdma fifo threshold calculate
 formula

Hi, Yongqiang:

On Mon, 2021-04-12 at 15:25 +0800, Yongqiang Niu wrote:
> the orginal formula will caused rdma fifo threshold config overflow
> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index 728aaad..8c9371b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -167,7 +167,7 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
>  	 * output threshold to 6 microseconds with 7/6 overhead to
>  	 * account for blanking, and with a pixel depth of 4 bytes:
>  	 */
> -	threshold = width * height * vrefresh * 4 * 7 / 1000000;
> +	threshold = rdma_fifo_size * 7 / 10;

It's better to set threshold by width and height, but it seems that no
one could come out a solution for all SoC. I could just accept this
solution, but I need some addition comment for this solution. How do you
decide 7/10? In the future, another may need to modify this value and he
need to know why you use 7/10. If you just choose it at random, just
tell us that you just randomly choose it.

Regards,
CK

>  	reg = RDMA_FIFO_UNDERFLOW_EN |
>  	      RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
>  	      RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ