linux-kernel - Re: [PATCH] mtd: spi-nor: macronix: Add block protection support to mx25u6435f

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Message-ID: <51761f1db840c51bad17f5f275b4ce1a@walle.cc>
Date:   Tue, 13 Apr 2021 14:26:36 +0200
From:   Michael Walle <michael@...le.cc>
To:     Ikjoon Jang <ikjn@...omium.org>
Cc:     linux-mtd@...ts.infradead.org,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Pratyush Yadav <p.yadav@...com>,
        Richard Weinberger <richard@....at>,
        Tudor Ambarus <tudor.ambarus@...rochip.com>,
        Vignesh Raghavendra <vigneshr@...com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: macronix: Add block protection support to
 mx25u6435f

Hi Ikjoon,

Am 2021-04-13 14:02, schrieb Ikjoon Jang:
> This patch adds block protection support to Macronix mx25u6432f and
> mx25u6435f. Two different chips share the same JEDEC ID while only
> mx25u6423f support section protections. And two chips have slightly
> different definitions of BP bits than generic (ST Micro) 
> implementation.

What is different compared to the current implementation? Could you give
an example?

> So this patch defines a new spi_nor_locking_ops only for macronix
> until this could be merged into a generic swp implementation.

TBH, I don't really like the code duplication and I'd presume that it
won't ever be merged with the generic code.

You also assume that both the WPSEL and T/B bit are 0, which might not
be true. Please note that both are write-once, thus should only be read.

See also:
https://lore.kernel.org/linux-mtd/346332bf6ab0dd92b9ffd9e126b6b97c@walle.cc/

-michael