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Message-ID: <c329f116-458c-0d33-3c8f-ee5d22189ca4@foss.st.com>
Date:   Fri, 16 Apr 2021 17:52:17 +0200
From:   Fabrice Gasnier <fabrice.gasnier@...s.st.com>
To:     Alexandre Torgue <alexandre.torgue@...s.st.com>
CC:     <arnd@...db.de>, <robh+dt@...nel.org>, Marek Vasut <marex@...x.de>,
        <jagan@...rulasolutions.com>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Marcin Sloniewski <marcin.sloniewski@...il.com>,
        Ahmad Fatoum <a.fatoum@...gutronix.de>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <kuba@...nel.org>, Lee Jones <lee.jones@...aro.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [Linux-stm32] [PATCH 03/13] ARM: dts: stm32: fix timer nodes on
 STM32 MCU to prevent warnings

On 4/15/21 12:10 PM, Alexandre Torgue wrote:
> Prevent warning seen with "make dtbs_check W=1" command:
> 
> Warning (avoid_unnecessary_addr_size): /soc/timers@...01c00: unnecessary
> address-cells/size-cells without "ranges" or child "reg" property
> 
> Signed-off-by: Alexandre Torgue <alexandre.torgue@...s.st.com>

Hi Alexandre,

Reviewed-by: Fabrice Gasnier <fabrice.gasnier@...s.st.com>

Thanks,
Fabrice
> 
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
> index 41e0087bdbf9..8748d5850298 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -283,8 +283,6 @@
>  		};
>  
>  		timers13: timers@...01c00 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40001C00 0x400>;
>  			clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
> @@ -299,8 +297,6 @@
>  		};
>  
>  		timers14: timers@...02000 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40002000 0x400>;
>  			clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
> @@ -633,8 +629,6 @@
>  		};
>  
>  		timers10: timers@...14400 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40014400 0x400>;
>  			clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
> @@ -649,8 +643,6 @@
>  		};
>  
>  		timers11: timers@...14800 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40014800 0x400>;
>  			clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> index e1df603fc981..72c1b76684b6 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -265,8 +265,6 @@
>  		};
>  
>  		timers13: timers@...01c00 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40001C00 0x400>;
>  			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
> @@ -281,8 +279,6 @@
>  		};
>  
>  		timers14: timers@...02000 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40002000 0x400>;
>  			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
> @@ -531,8 +527,6 @@
>  		};
>  
>  		timers10: timers@...14400 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40014400 0x400>;
>  			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
> @@ -547,8 +541,6 @@
>  		};
>  
>  		timers11: timers@...14800 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40014800 0x400>;
>  			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
> diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
> index 05ecdf9ff03a..6e42ca2dada2 100644
> --- a/arch/arm/boot/dts/stm32h743.dtsi
> +++ b/arch/arm/boot/dts/stm32h743.dtsi
> @@ -485,8 +485,6 @@
>  		};
>  
>  		lptimer4: timer@...02c00 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-lptimer";
>  			reg = <0x58002c00 0x400>;
>  			clocks = <&rcc LPTIM4_CK>;
> @@ -501,8 +499,6 @@
>  		};
>  
>  		lptimer5: timer@...03000 {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			compatible = "st,stm32-lptimer";
>  			reg = <0x58003000 0x400>;
>  			clocks = <&rcc LPTIM5_CK>;
> 

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