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Message-ID: <20210419150705.GB5645@sirena.org.uk>
Date: Mon, 19 Apr 2021 16:07:05 +0100
From: Mark Brown <broonie@...nel.org>
To: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
Cc: Codrin.Ciubotariu@...rochip.com, alsa-devel@...a-project.org,
lgirdwood@...il.com, linux-kernel@...r.kernel.org, tiwai@...e.com,
gustavoars@...nel.org, mirq-linux@...e.qmqm.pl
Subject: Re: [RFC PATCH 0/3] Separate BE DAI HW constraints from FE ones
On Fri, Apr 16, 2021 at 02:39:25PM -0500, Pierre-Louis Bossart wrote:
> On 4/16/21 1:55 PM, Mark Brown wrote:
> > to the maximum supported bit width for internal operation so bit width
> > only matters on external interfaces) but I think for a first pass we can
> > get away with forcing everything other than what DPCM has as front ends
> > into static configurations.
> You lost me on the last sentence. did you mean "forcing everything into
> static configurations except for what DPCM has as front-ends"?
Yes...
> It may already be too late for static configurations, Intel, NXP and others
> have started to enable cases where the dailink configuration varies.
Well, they won't be able to use any new stuff until someone implements
support for dynamic configurations in the new stuff.
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