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Message-ID: <CAJF2gTRkWD6NcfriQhLBYL0eBafNmLx1Kw_Rmaex3851SzVBWQ@mail.gmail.com>
Date: Tue, 20 Apr 2021 09:22:33 +0800
From: Guo Ren <guoren@...nel.org>
To: Arnd Bergmann <arnd@...db.de>
Cc: Peter Zijlstra <peterz@...radead.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-csky@...r.kernel.org,
linux-arch <linux-arch@...r.kernel.org>,
Guo Ren <guoren@...ux.alibaba.com>,
Anup Patel <anup@...infault.org>,
Palmer Dabbelt <palmerdabbelt@...gle.com>
Subject: Re: [PATCH v2 (RESEND) 2/2] riscv: atomic: Using ARCH_ATOMIC in asm/atomic.h
On Mon, Apr 19, 2021 at 7:46 PM Arnd Bergmann <arnd@...db.de> wrote:
>
> On Sat, Apr 17, 2021 at 6:45 AM <guoren@...nel.org> wrote:
> > +#define arch_atomic_read(v) __READ_ONCE((v)->counter)
> > +#define arch_atomic_set(v, i) __WRITE_ONCE(((v)->counter), (i))
>
> > +#define ATOMIC64_INIT ATOMIC_INIT
> > +#define arch_atomic64_read arch_atomic_read
> > +#define arch_atomic64_set arch_atomic_set
> > #endif
>
> I think it's a bit confusing to define arch_atomic64_read() etc in terms
> of arch_atomic_read(), given that they operate on different types.
>
> IMHO the clearest would be to define both in terms of the open-coded
> version you have for the 32-bit atomics.
Okay:
+#define arch_atomic64_read __READ_ONCE((v)->counter)
+#define arch_atomic64_set
__WRITE_ONCE(((v)->counter), (i))
>
> Also, given that all three architectures (x86, arm64, riscv) use the same
> definitions for the six macros above, maybe those can just get moved
> into a common file with a possible override?
I'll try it with a separate patch.
>
> x86 uses an inline function here instead of the macro. This would also
> be my preference, but it may add complexity to avoid circular header
> dependencies.
>
> The rest of this patch looks good to me.
>
> Arnd
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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