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Message-ID: <YH6rRUXyNdC6DDzQ@smile.fi.intel.com>
Date: Tue, 20 Apr 2021 13:21:57 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Bingbu Cao <bingbu.cao@...el.com>
Cc: linux-kernel@...r.kernel.org, stable@...r.kernel.org,
linux-pci@...r.kernel.org, iommu@...ts.linux-foundation.org,
dwmw2@...radead.org, baolu.lu@...ux.intel.com, joro@...tes.org,
will@...nel.org, bhelgaas@...gle.com, rajatja@...gle.com,
grundler@...omium.org, tfiga@...omium.org,
senozhatsky@...omium.org, sakari.ailus@...ux.intel.com,
bingbu.cao@...ux.intel.com
Subject: Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs
On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote:
> Intel IPU(Image Processing Unit) has its own (IO)MMU hardware,
> The IPU driver allocates its own page table that is not mapped
> via the DMA, and thus the Intel IOMMU driver blocks access giving
> this error:
>
> DMAR: DRHD: handling fault status reg 3
> DMAR: [DMA Read] Request device [00:05.0] PASID ffffffff
> fault addr 76406000 [fault reason 06] PTE Read access is not set
>
> As IPU is not an external facing device which is not risky, so use
> IOMMU passthrough mode for Intel IPUs.
I'm wondering if IPU MMU should be described properly in the DMAR table.
--
With Best Regards,
Andy Shevchenko
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