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Message-ID: <20210420132614.150242-4-jitao.shi@mediatek.com>
Date: Tue, 20 Apr 2021 21:26:13 +0800
From: Jitao Shi <jitao.shi@...iatek.com>
To: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...ux.ie>,
<dri-devel@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
CC: <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<srv_heupstream@...iatek.com>, <yingjoe.chen@...iatek.com>,
<eddie.huang@...iatek.com>, <cawa.cheng@...iatek.com>,
<bibby.hsieh@...iatek.com>, <ck.hu@...iatek.com>,
<stonea168@....com>, <huijuan.xie@...iatek.com>,
<rex-bc.chen@...iatek.com>, Jitao Shi <jitao.shi@...iatek.com>
Subject: [PATCH 4/4] drm/mediatek: add dsi module reset driver
Reset dsi HW to default when power on. Prevent the setting differet
between bootloader and kernel.
Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 36 +++++++++++++++++++++++++++++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 455fe582c6b5..113438ddd4cc 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -7,10 +7,12 @@
#include <linux/component.h>
#include <linux/iopoll.h>
#include <linux/irq.h>
+#include <linux/mfd/syscon.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <video/mipi_display.h>
#include <video/videomode.h>
@@ -143,6 +145,8 @@
#define DATA_0 (0xff << 16)
#define DATA_1 (0xff << 24)
+#define MMSYS_SW_RST_DSI_B BIT(25)
+
#define NS_TO_CYCLE(n, c) ((n) / (c) + (((n) % (c)) ? 1 : 0))
#define MTK_DSI_HOST_IS_READ(type) \
@@ -186,7 +190,8 @@ struct mtk_dsi {
struct drm_bridge *next_bridge;
struct drm_connector *connector;
struct phy *phy;
-
+ struct regmap *mmsys_sw_rst_b;
+ u32 sw_rst_b;
void __iomem *regs;
struct clk *engine_clk;
@@ -272,6 +277,16 @@ static void mtk_dsi_disable(struct mtk_dsi *dsi)
mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_EN, 0);
}
+static void mtk_dsi_reset_all(struct mtk_dsi *dsi)
+{
+ regmap_update_bits(dsi->mmsys_sw_rst_b, dsi->sw_rst_b,
+ MMSYS_SW_RST_DSI_B, 0);
+ usleep_range(1000, 1100);
+
+ regmap_update_bits(dsi->mmsys_sw_rst_b, dsi->sw_rst_b,
+ MMSYS_SW_RST_DSI_B, MMSYS_SW_RST_DSI_B);
+}
+
static void mtk_dsi_reset_engine(struct mtk_dsi *dsi)
{
mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_RESET, DSI_RESET);
@@ -985,6 +1000,8 @@ static int mtk_dsi_bind(struct device *dev, struct device *master, void *data)
ret = mtk_dsi_encoder_init(drm, dsi);
+ mtk_dsi_reset_all(dsi);
+
return ret;
}
@@ -1007,6 +1024,7 @@ static int mtk_dsi_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct drm_panel *panel;
struct resource *regs;
+ struct regmap *regmap;
int irq_num;
int ret;
@@ -1022,6 +1040,22 @@ static int mtk_dsi_probe(struct platform_device *pdev)
return ret;
}
+ regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
+ "mediatek,syscon-dsi");
+ ret = of_property_read_u32_index(dev->of_node, "mediatek,syscon-dsi", 1,
+ &dsi->sw_rst_b);
+
+ if (IS_ERR(regmap))
+ ret = PTR_ERR(regmap);
+
+ if (ret) {
+ ret = PTR_ERR(regmap);
+ dev_err(dev, "Failed to get mmsys registers: %d\n", ret);
+ return ret;
+ }
+
+ dsi->mmsys_sw_rst_b = regmap;
+
ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
&panel, &dsi->next_bridge);
if (ret)
--
2.25.1
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