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Message-Id: <784f9a121078d7ed0793ec2e8f4a0732266213ff.1619013347.git.viremana@linux.microsoft.com>
Date: Wed, 21 Apr 2021 14:06:52 +0000
From: Vineeth Pillai <viremana@...ux.microsoft.com>
To: Lan Tianyu <Tianyu.Lan@...rosoft.com>,
Michael Kelley <mikelley@...rosoft.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>, Wei Liu <wei.liu@...nel.org>,
Stephen Hemminger <sthemmin@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>
Cc: Vineeth Pillai <viremana@...ux.microsoft.com>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
"K. Y. Srinivasan" <kys@...rosoft.com>, x86@...nel.org,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-hyperv@...r.kernel.org
Subject: [PATCH v3 5/7] KVM: SVM: hyper-v: Remote TLB flush for SVM
Enable remote TLB flush for SVM.
Signed-off-by: Vineeth Pillai <viremana@...ux.microsoft.com>
---
arch/x86/kvm/svm/svm.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 9a241a0806cd..79d27a9f4b7c 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -37,6 +37,7 @@
#include <asm/spec-ctrl.h>
#include <asm/cpu_device_id.h>
#include <asm/traps.h>
+#include <asm/mshyperv.h>
#include <asm/virtext.h>
#include "trace.h"
@@ -44,6 +45,9 @@
#include "svm.h"
#include "svm_ops.h"
+#include "hyperv.h"
+#include "kvm_onhyperv.h"
+
#define __ex(x) __kvm_handle_fault_on_reboot(x)
MODULE_AUTHOR("Qumranet");
@@ -931,6 +935,8 @@ static __init void svm_set_cpu_caps(void)
kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);
}
+static struct kvm_x86_ops svm_x86_ops;
+
static __init int svm_hardware_setup(void)
{
int cpu;
@@ -1000,6 +1006,16 @@ static __init int svm_hardware_setup(void)
kvm_configure_mmu(npt_enabled, get_max_npt_level(), PG_LEVEL_1G);
pr_info("kvm: Nested Paging %sabled\n", npt_enabled ? "en" : "dis");
+#if IS_ENABLED(CONFIG_HYPERV)
+ if (ms_hyperv.nested_features & HV_X64_NESTED_ENLIGHTENED_TLB
+ && npt_enabled) {
+ pr_info("kvm: Hyper-V enlightened NPT TLB flush enabled\n");
+ svm_x86_ops.tlb_remote_flush = kvm_hv_remote_flush_tlb;
+ svm_x86_ops.tlb_remote_flush_with_range =
+ kvm_hv_remote_flush_tlb_with_range;
+ }
+#endif
+
if (nrips) {
if (!boot_cpu_has(X86_FEATURE_NRIPS))
nrips = false;
@@ -1120,6 +1136,21 @@ static void svm_check_invpcid(struct vcpu_svm *svm)
}
}
+#if IS_ENABLED(CONFIG_HYPERV)
+static inline void hv_init_vmcb(struct vmcb *vmcb)
+{
+ struct hv_enlightenments *hve = &vmcb->hv_enlightenments;
+
+ if (npt_enabled &&
+ ms_hyperv.nested_features & HV_X64_NESTED_ENLIGHTENED_TLB)
+ hve->hv_enlightenments_control.enlightened_npt_tlb = 1;
+}
+#else
+static inline void hv_init_vmcb(struct vmcb *vmcb)
+{
+}
+#endif
+
static void init_vmcb(struct vcpu_svm *svm)
{
struct vmcb_control_area *control = &svm->vmcb->control;
@@ -1282,6 +1313,8 @@ static void init_vmcb(struct vcpu_svm *svm)
}
}
+ hv_init_vmcb(svm->vmcb);
+
vmcb_mark_all_dirty(svm->vmcb);
enable_gif(svm);
@@ -3975,6 +4008,11 @@ static void svm_load_mmu_pgd(struct kvm_vcpu *vcpu, unsigned long root,
svm->vmcb->control.nested_cr3 = cr3;
vmcb_mark_dirty(svm->vmcb, VMCB_NPT);
+#if IS_ENABLED(CONFIG_HYPERV)
+ if (kvm_x86_ops.tlb_remote_flush)
+ kvm_update_arch_tdp_pointer(vcpu->kvm, vcpu, cr3);
+#endif
+
/* Loading L2's CR3 is handled by enter_svm_guest_mode. */
if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
return;
--
2.25.1
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