lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <a5e1caeb-f298-e7b2-9132-17aa8f249cec@canonical.com>
Date:   Thu, 22 Apr 2021 16:11:46 +0100
From:   Colin Ian King <colin.king@...onical.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        x86@...nel.org, "H . Peter Anvin" <hpa@...or.com>,
        kvm@...r.kernel.org, kernel-janitors@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH][next] KVM: x86: simplify zero'ing of entry->ebx

On 22/04/2021 16:07, Sean Christopherson wrote:
> On Thu, Apr 22, 2021, Colin King wrote:
>> From: Colin Ian King <colin.king@...onical.com>
>>
>> Currently entry->ebx is being zero'd by masking itself with zero.
>> Simplify this by just assigning zero, cleans up static analysis
>> warning.
>>
>> Addresses-Coverity: ("Bitwise-and with zero")
>> Signed-off-by: Colin Ian King <colin.king@...onical.com>
>> ---
>>  arch/x86/kvm/cpuid.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index 57744a5d1bc2..9bcc2ff4b232 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -851,7 +851,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>>  		entry->eax &= SGX_ATTR_DEBUG | SGX_ATTR_MODE64BIT |
>>  			      SGX_ATTR_PROVISIONKEY | SGX_ATTR_EINITTOKENKEY |
>>  			      SGX_ATTR_KSS;
>> -		entry->ebx &= 0;
>> +		entry->ebx = 0;
> 
> I 100% understand the code is funky, but using &= is intentional.  ebx:eax holds
> a 64-bit value that is a effectively a set of feature flags.  While the upper
> 32 bits are extremely unlikely to be used any time soon, if a feature comes
> along then the correct behavior would be:
> 
> 		entry->ebx &= SGX_ATTR_FANCY_NEW_FEATURE;
> 
> While directly setting entry->ebx would be incorrect.  The idea is to set up a
> future developer for success so that they don't forget to add the "&".
> 
> TL;DR: I'd prefer to keep this as is, even though it's rather ridiculous.

OK, makes sense. Thanks for explaining.

> 
>>  		break;
>>  	/* Intel PT */
>>  	case 0x14:
>> -- 
>> 2.30.2
>>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ