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Message-ID: <20210422171554.GA14257@alpha.franken.de>
Date: Thu, 22 Apr 2021 19:15:54 +0200
From: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To: Marc Zyngier <maz@...nel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/2] irqchip: Add support for IDT 79rc3243x interrupt
controller
On Thu, Apr 22, 2021 at 04:06:55PM +0100, Marc Zyngier wrote:
> On Thu, 22 Apr 2021 15:53:28 +0100,
> Thomas Bogendoerfer <tsbogend@...ha.franken.de> wrote:
> >
> > IDT 79rc3243x SoCs have rather simple interrupt controllers connected
> > to the MIPS CPU interrupt lines. Each of them has room for up to
> > 32 interrupts.
> >
> > Signed-off-by: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
> > ---
> > Changes in v4:
> > - changed comaptible string to idt,32434-pic
>
> I have dropped v3 from irq/irqchip-next and picked v4, but please send
thanks
> patches on top of that version if you have further changes.
sure will do.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
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