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Message-ID: <YIMHzx6gerPEzbKJ@vkoul-mobl.Dlink>
Date: Fri, 23 Apr 2021 23:15:51 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Tom Zanussi <tom.zanussi@...ux.intel.com>
Cc: peterz@...radead.org, acme@...nel.org, mingo@...nel.org,
kan.liang@...ux.intel.com, dave.jiang@...el.com,
tony.luck@...el.com, dan.j.williams@...el.com,
linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org
Subject: Re: [PATCH v3 0/2] dmaengine: idxd: IDXD pmu support
On 21-04-21, 16:04, Tom Zanussi wrote:
> Hi,
>
> This is v3 of the IDXD pmu support patch, which addresses the comments
> from Vinod:
>
> - Removed the default line for INTEL_IDXD_PERFMON making it default 'n'
>
> - Replaced #ifdef CONFIG_INTEL_IDXD_PERFMON with IS_ENABLED()
>
> - Split the patch into two separate patches, the perfmon
> implementation and the code that uses it in the IDXD driver.
>
> - Added a new file,
> Documentation/ABI/testing/sysfs-bus-event_source-devices-dsa that
> documents the new format and cpumask attributes, and added better
> comments for those in the code.
>
> - Changed 'dogrp' to 'do_group' in perfmon_collect_events()
>
> - Moved 'int idx' inside the loop in perfmon_validate_group() to the
> top of function.
>
> - In perfmon_pmu_read_counter(), return ioread64() directly and get
> rid of cntrdata.
>
> I also fixed some erroneous code in perfmon_counter_overflow() that
> because of my misreading of the spec caused unintended clearing of
> wrong bits. According to the spec you need to write 1 rather than 0
> to an OVFSTATUS bit to clear it.
Applied, thanks
This conflicted with Daves patches, I managed to resolve, pls check the
end result
--
~Vinod
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