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Message-ID: <c6a63d27-e0d9-ec7e-0f40-907084dde28f@foss.st.com>
Date: Mon, 26 Apr 2021 12:44:22 +0200
From: Patrice CHOTARD <patrice.chotard@...s.st.com>
To: <robh+dt@...nel.org>, <mark.rutland@....com>,
<alexandre.torgue@...s.st.com>
CC: <mcoquelin.stm32@...il.com>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux@...linux.org.uk>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
"Christophe Kerello" <christophe.kerello@...com>
Subject: Re: [1/1] ARM: dts: stm32: Configure qspi's mdma transfer to block
for stm32mp151
Don't take care of this patch, i will resend it with the correct header.
Patrice
On 4/26/21 12:39 PM, patrice.chotard@...s.st.com wrote:
> From: Patrice Chotard <patrice.chotard@...s.st.com>
>
> Configure qspi's mdma from buffer transfer (max 128 bytes) to
> block transfer (max 64K bytes).
>
> mtd_speedtest shows that write throughtput increases :
> - from 734 to 782 KiB/s (~6.5%) with s25fl512s SPI-NOR.
> - from 4848 to 5319 KiB/s (~9.72%) with Micron SPI-NAND.
>
> Signed-off-by: Christophe Kerello <christophe.kerello@...com>
> Signed-off-by: Patrice Chotard <patrice.chotard@...s.st.com>
> ---
> arch/arm/boot/dts/stm32mp151.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
> index 4b8031782555..cb326c1e12bc 100644
> --- a/arch/arm/boot/dts/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/stm32mp151.dtsi
> @@ -1358,8 +1358,8 @@
> reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
> reg-names = "qspi", "qspi_mm";
> interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&mdma1 22 0x2 0x100002 0x0 0x0>,
> - <&mdma1 22 0x2 0x100008 0x0 0x0>;
> + dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>,
> + <&mdma1 22 0x2 0x10100008 0x0 0x0>;
> dma-names = "tx", "rx";
> clocks = <&rcc QSPI_K>;
> resets = <&rcc QSPI_R>;
>
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