lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <d36f0be0-3358-971c-e385-f920cfa333cd@gmail.com>
Date:   Tue, 27 Apr 2021 21:19:54 +0300
From:   Péter Ujfalusi <peter.ujfalusi@...il.com>
To:     Vignesh Raghavendra <vigneshr@...com>, Nishanth Menon <nm@...com>,
        Tero Kristo <kristo@...nel.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: ti: j7200-main: Mark Main NAVSS as
 dma-coherent



On 4/27/21 8:51 PM, Vignesh Raghavendra wrote:
> Traffic through main NAVSS interconnect is coherent wrt ARM caches on
> J7200 SoC.  Add missing dma-coherent property to main_navss node.
> 
> Also add dma-ranges to be consistent with mcu_navss node.

and with am65, j721e main and mcu navss...

Reviewed-by: Peter Ujfalusi <peter.ujfalusi@...il.com>

> Fixes: d361ed88455fe ("arm64: dts: ti: Add support for J7200 SoC")
> Signed-off-by: Vignesh Raghavendra <vigneshr@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index f86c493a44f1c..a6826f1888ef0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -85,6 +85,8 @@ main_navss: bus@...00000 {
>  		#size-cells = <2>;
>  		ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
>  		ti,sci-dev-id = <199>;
> +		dma-coherent;
> +		dma-ranges;
>  
>  		main_navss_intr: interrupt-controller1 {
>  			compatible = "ti,sci-intr";
> 

-- 
Péter

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ