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Message-ID: <575a9235-7753-d589-2173-050a16063b71@codeaurora.org>
Date:   Tue, 27 Apr 2021 15:18:20 +0530
From:   Taniya Das <tdas@...eaurora.org>
To:     Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>
Cc:     Rajendra Nayak <rnayak@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, robh@...nel.org, robh+dt@...nel.org
Subject: Re: [PATCH v1 4/6] clk: qcom: Add graphics clock controller driver
 for SC7280

Hello Stephen,

Thank you for your review.

On 4/8/2021 12:52 PM, Stephen Boyd wrote:
> Quoting Taniya Das (2021-03-16 18:22:20)
>> +static struct clk_regmap_div gpu_cc_hub_ahb_div_clk_src = {
>> +       .reg = 0x11c0,
>> +       .shift = 0,
>> +       .width = 4,
>> +       .clkr.hw.init = &(struct clk_init_data) {
>> +               .name = "gpu_cc_hub_ahb_div_clk_src",
>> +               .parent_data = &(const struct clk_parent_data){
>> +                       .hw = &gpu_cc_hub_clk_src.clkr.hw,
> 
> Can you follow what Dmitry has done and use .hws instead of
> clk_parent_data when the whole array is clk_hw pointers?
> 

Will update them in the next patch.

>> +               },
>> +               .num_parents = 1,
>> +               .flags = CLK_SET_RATE_PARENT,
>> +               .ops = &clk_regmap_div_ro_ops,
>> +       },
>> +};
>> +

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

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