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Message-ID: <e6bc62d5-50e8-15cf-915f-de15b3d7b860@linux.intel.com>
Date:   Wed, 28 Apr 2021 09:18:11 +0800
From:   "Jin, Yao" <yao.jin@...ux.intel.com>
To:     Arnaldo Carvalho de Melo <acme@...nel.org>
Cc:     jolsa@...nel.org, peterz@...radead.org, mingo@...hat.com,
        alexander.shishkin@...ux.intel.com, Linux-kernel@...r.kernel.org,
        ak@...ux.intel.com, kan.liang@...el.com, yao.jin@...el.com
Subject: Re: [PATCH v6 01/26] tools headers uapi: Update tools's copy of
 linux/perf_event.h

Hi Arnaldo,

On 4/28/2021 3:24 AM, Arnaldo Carvalho de Melo wrote:
> Em Tue, Apr 27, 2021 at 03:01:14PM +0800, Jin Yao escreveu:
>> To get the changes in:
>>
>> Liang Kan's patch
>> [PATCH V6 21/25] perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE
>>
>> Kan's patch is upstreamed yet but perf/core branch doesn't have it
>> at this moment. But next perf tool patches need this interface for
>> hybrid support.
>>
>> This patch can be removed after Kan's patch is merged in perf/core
>> branch.
> 
> Nope, it is already in tip/perf/core as:
> 
>    55bcf6ef314ae8ba ("perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE")
> 

Oh, the perf/core mentioned here just means the "perf/core" from acme/linux.git. Sorry, I didn't say 
this clearly. I guess it will be merged to acme/linux.git at some window.

> And your patch, the one below, shouldn't include the kernel file, i.e. include/uapi/linux/perf_event.h
> as tooling only uses the one in tools/include/uapi/linux/perf_event.h.
> 

Yes, my fault. I only need to update the tools/include/uapi/linux/perf_event.h. You have helped me 
to update the commit 7ad6382ef375 ("tools headers uapi: Update tools's copy of linux/perf_event.h") 
in tmp.perf/core. Thanks so much!

> Leave the perf tool build warning there, as soon as both acme/perf/core
> and tip/perf/core hit torvalds/master, all gets solved.
> 
> So I'm removing it here in addition to updating the commit log message.
> 

Thanks again!

> Ah good news, the test builds passed in all my test build containers.
>

Great! :)

> I'll refresh tmp.perf/core once I update these messages, etc. So that we
> can continue from there in case you need to respin a v7.
> 

I've seen the patches have been applied in tmp.perf/core now, thanks! If we need v7, we can continue 
from tmp.perf/core.

Thanks
Jin Yao

> Thanks,
> 
> - Arnaldo.
> 
> 
>   
>> Signed-off-by: Jin Yao <yao.jin@...ux.intel.com>
>> ---
>> v6:
>>   - No update.
>>
>> v5:
>>   - Update the commit message to mention that Kan's patch is
>>     upstreamed but not merged to perf/core branch.
>>
>> v4:
>>   - Updated by Kan's latest patch,
>>     '[PATCH V6 21/25] perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE'
>>
>>   include/uapi/linux/perf_event.h       | 15 +++++++++++++++
>>   tools/include/uapi/linux/perf_event.h | 15 +++++++++++++++
>>   2 files changed, 30 insertions(+)
>>
>> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
>> index ad15e40d7f5d..14332f4cf816 100644
>> --- a/include/uapi/linux/perf_event.h
>> +++ b/include/uapi/linux/perf_event.h
>> @@ -37,6 +37,21 @@ enum perf_type_id {
>>   	PERF_TYPE_MAX,				/* non-ABI */
>>   };
>>   
>> +/*
>> + * attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE
>> + * PERF_TYPE_HARDWARE:			0xEEEEEEEE000000AA
>> + *					AA: hardware event ID
>> + *					EEEEEEEE: PMU type ID
>> + * PERF_TYPE_HW_CACHE:			0xEEEEEEEE00DDCCBB
>> + *					BB: hardware cache ID
>> + *					CC: hardware cache op ID
>> + *					DD: hardware cache op result ID
>> + *					EEEEEEEE: PMU type ID
>> + * If the PMU type ID is 0, the PERF_TYPE_RAW will be applied.
>> + */
>> +#define PERF_PMU_TYPE_SHIFT		32
>> +#define PERF_HW_EVENT_MASK		0xffffffff
>> +
>>   /*
>>    * Generalized performance event event_id types, used by the
>>    * attr.event_id parameter of the sys_perf_event_open()
>> diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h
>> index ad15e40d7f5d..14332f4cf816 100644
>> --- a/tools/include/uapi/linux/perf_event.h
>> +++ b/tools/include/uapi/linux/perf_event.h
>> @@ -37,6 +37,21 @@ enum perf_type_id {
>>   	PERF_TYPE_MAX,				/* non-ABI */
>>   };
>>   
>> +/*
>> + * attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE
>> + * PERF_TYPE_HARDWARE:			0xEEEEEEEE000000AA
>> + *					AA: hardware event ID
>> + *					EEEEEEEE: PMU type ID
>> + * PERF_TYPE_HW_CACHE:			0xEEEEEEEE00DDCCBB
>> + *					BB: hardware cache ID
>> + *					CC: hardware cache op ID
>> + *					DD: hardware cache op result ID
>> + *					EEEEEEEE: PMU type ID
>> + * If the PMU type ID is 0, the PERF_TYPE_RAW will be applied.
>> + */
>> +#define PERF_PMU_TYPE_SHIFT		32
>> +#define PERF_HW_EVENT_MASK		0xffffffff
>> +
>>   /*
>>    * Generalized performance event event_id types, used by the
>>    * attr.event_id parameter of the sys_perf_event_open()
>> -- 
>> 2.17.1
>>
> 

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