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Message-Id: <20210429170147.3615883-1-narmstrong@baylibre.com>
Date: Thu, 29 Apr 2021 19:01:47 +0200
From: Neil Armstrong <narmstrong@...libre.com>
To: broonie@...nel.org, jbrunet@...libre.com
Cc: alsa-devel@...a-project.org, linux-amlogic@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Neil Armstrong <narmstrong@...libre.com>
Subject: [PATCH] ASoC: meson: g12a-toacodec: add support for SM1 TOACODEC
This adds support for the TOACODEC found in Amlogic SM1 SoCs.
The bits are shifted for more selection of clock sources, so this only
maps the same support for G12A to the SM1 bits.
Signed-off-by: Neil Armstrong <narmstrong@...libre.com>
---
sound/soc/meson/g12a-toacodec.c | 126 +++++++++++++++++++++++++++++++-
1 file changed, 124 insertions(+), 2 deletions(-)
diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacodec.c
index 9339fabccb79..9c1c6b65baad 100644
--- a/sound/soc/meson/g12a-toacodec.c
+++ b/sound/soc/meson/g12a-toacodec.c
@@ -23,15 +23,27 @@
#define CTRL0_ENABLE_SHIFT 31
#define CTRL0_DAT_SEL_SHIFT 14
#define CTRL0_DAT_SEL (0x3 << CTRL0_DAT_SEL_SHIFT)
+#define CTRL0_DAT_SEL_SHIFT_SM1 18
+#define CTRL0_DAT_SEL_SM1 (0x3 << CTRL0_DAT_SEL_SHIFT_SM1)
#define CTRL0_LANE_SEL 12
+#define CTRL0_LANE_SEL_SM1 16
#define CTRL0_LRCLK_SEL GENMASK(9, 8)
+#define CTRL0_LRCLK_INV_SM1 BIT(10)
+#define CTRL0_LRCLK_SEL_SM1 GENMASK(14, 12)
#define CTRL0_BLK_CAP_INV BIT(7)
+#define CTRL0_BLK_CAP_INV_SM1 BIT(9)
#define CTRL0_BCLK_O_INV BIT(6)
+#define CTRL0_BCLK_O_INV_SM1 BIT(8)
#define CTRL0_BCLK_SEL GENMASK(5, 4)
+#define CTRL0_BCLK_SEL_SM1 GENMASK(6, 4)
#define CTRL0_MCLK_SEL GENMASK(2, 0)
#define TOACODEC_OUT_CHMAX 2
+struct g12a_toacodec_match_data {
+ const struct snd_soc_component_driver *component_drv;
+};
+
static const char * const g12a_toacodec_mux_texts[] = {
"I2S A", "I2S B", "I2S C",
};
@@ -85,15 +97,73 @@ static int g12a_toacodec_mux_put_enum(struct snd_kcontrol *kcontrol,
return 0;
}
+static int sm1_toacodec_mux_put_enum(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component =
+ snd_soc_dapm_kcontrol_component(kcontrol);
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+ unsigned int mux, changed;
+
+ mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
+ changed = snd_soc_component_test_bits(component, e->reg,
+ CTRL0_DAT_SEL_SM1,
+ FIELD_PREP(CTRL0_DAT_SEL_SM1, mux));
+
+ if (!changed)
+ return 0;
+
+ /* Force disconnect of the mux while updating */
+ snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
+
+ snd_soc_component_update_bits(component, e->reg,
+ CTRL0_DAT_SEL_SM1 |
+ CTRL0_LRCLK_SEL_SM1 |
+ CTRL0_BCLK_SEL_SM1,
+ FIELD_PREP(CTRL0_DAT_SEL_SM1, mux) |
+ FIELD_PREP(CTRL0_LRCLK_SEL_SM1, mux) |
+ FIELD_PREP(CTRL0_BCLK_SEL_SM1, mux));
+
+ /*
+ * FIXME:
+ * On this soc, the glue gets the MCLK directly from the clock
+ * controller instead of going the through the TDM interface.
+ *
+ * Here we assume interface A uses clock A, etc ... While it is
+ * true for now, it could be different. Instead the glue should
+ * find out the clock used by the interface and select the same
+ * source. For that, we will need regmap backed clock mux which
+ * is a work in progress
+ */
+ snd_soc_component_update_bits(component, e->reg,
+ CTRL0_MCLK_SEL,
+ FIELD_PREP(CTRL0_MCLK_SEL, mux));
+
+ snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
+
+ return 0;
+}
+
static SOC_ENUM_SINGLE_DECL(g12a_toacodec_mux_enum, TOACODEC_CTRL0,
CTRL0_DAT_SEL_SHIFT,
g12a_toacodec_mux_texts);
+static SOC_ENUM_SINGLE_DECL(sm1_toacodec_mux_enum, TOACODEC_CTRL0,
+ CTRL0_DAT_SEL_SHIFT_SM1,
+ g12a_toacodec_mux_texts);
+
static const struct snd_kcontrol_new g12a_toacodec_mux =
SOC_DAPM_ENUM_EXT("Source", g12a_toacodec_mux_enum,
snd_soc_dapm_get_enum_double,
g12a_toacodec_mux_put_enum);
+static const struct snd_kcontrol_new sm1_toacodec_mux =
+ SOC_DAPM_ENUM_EXT("Source", sm1_toacodec_mux_enum,
+ snd_soc_dapm_get_enum_double,
+ sm1_toacodec_mux_put_enum);
+
static const struct snd_kcontrol_new g12a_toacodec_out_enable =
SOC_DAPM_SINGLE_AUTODISABLE("Switch", TOACODEC_CTRL0,
CTRL0_ENABLE_SHIFT, 1, 0);
@@ -105,6 +175,13 @@ static const struct snd_soc_dapm_widget g12a_toacodec_widgets[] = {
&g12a_toacodec_out_enable),
};
+static const struct snd_soc_dapm_widget sm1_toacodec_widgets[] = {
+ SND_SOC_DAPM_MUX("SRC", SND_SOC_NOPM, 0, 0,
+ &sm1_toacodec_mux),
+ SND_SOC_DAPM_SWITCH("OUT EN", SND_SOC_NOPM, 0, 0,
+ &g12a_toacodec_out_enable),
+};
+
static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -175,6 +252,13 @@ static int g12a_toacodec_component_probe(struct snd_soc_component *c)
CTRL0_BLK_CAP_INV);
}
+static int sm1_toacodec_component_probe(struct snd_soc_component *c)
+{
+ /* Initialize the static clock parameters */
+ return snd_soc_component_write(c, TOACODEC_CTRL0,
+ CTRL0_BLK_CAP_INV_SM1);
+}
+
static const struct snd_soc_dapm_route g12a_toacodec_routes[] = {
{ "SRC", "I2S A", "IN A Playback" },
{ "SRC", "I2S B", "IN B Playback" },
@@ -187,6 +271,10 @@ static const struct snd_kcontrol_new g12a_toacodec_controls[] = {
SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL, 3, 0),
};
+static const struct snd_kcontrol_new sm1_toacodec_controls[] = {
+ SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0),
+};
+
static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
.probe = g12a_toacodec_component_probe,
.controls = g12a_toacodec_controls,
@@ -199,25 +287,59 @@ static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
.non_legacy_dai_naming = 1,
};
+static const struct snd_soc_component_driver sm1_toacodec_component_drv = {
+ .probe = sm1_toacodec_component_probe,
+ .controls = sm1_toacodec_controls,
+ .num_controls = ARRAY_SIZE(sm1_toacodec_controls),
+ .dapm_widgets = sm1_toacodec_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(sm1_toacodec_widgets),
+ .dapm_routes = g12a_toacodec_routes,
+ .num_dapm_routes = ARRAY_SIZE(g12a_toacodec_routes),
+ .endianness = 1,
+ .non_legacy_dai_naming = 1,
+};
+
static const struct regmap_config g12a_toacodec_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
};
+static const struct g12a_toacodec_match_data g12a_toacodec_match_data = {
+ .component_drv = &g12a_toacodec_component_drv,
+};
+
+static const struct g12a_toacodec_match_data sm1_toacodec_match_data = {
+ .component_drv = &sm1_toacodec_component_drv,
+};
+
static const struct of_device_id g12a_toacodec_of_match[] = {
- { .compatible = "amlogic,g12a-toacodec", },
+ {
+ .compatible = "amlogic,g12a-toacodec",
+ .data = &g12a_toacodec_match_data,
+ },
+ {
+ .compatible = "amlogic,sm1-toacodec",
+ .data = &sm1_toacodec_match_data,
+ },
{}
};
MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match);
static int g12a_toacodec_probe(struct platform_device *pdev)
{
+ const struct g12a_toacodec_match_data *data;
struct device *dev = &pdev->dev;
void __iomem *regs;
struct regmap *map;
int ret;
+ data = device_get_match_data(dev);
+ if (!data) {
+ dev_err(dev, "failed to match device\n");
+ return -ENODEV;
+ }
+
ret = device_reset(dev);
if (ret)
return ret;
@@ -234,7 +356,7 @@ static int g12a_toacodec_probe(struct platform_device *pdev)
}
return devm_snd_soc_register_component(dev,
- &g12a_toacodec_component_drv, g12a_toacodec_dai_drv,
+ data->component_drv, g12a_toacodec_dai_drv,
ARRAY_SIZE(g12a_toacodec_dai_drv));
}
--
2.25.1
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