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Message-Id: <20210430123822.13825-8-brijesh.singh@amd.com>
Date: Fri, 30 Apr 2021 07:37:52 -0500
From: Brijesh Singh <brijesh.singh@....com>
To: x86@...nel.org, linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Cc: tglx@...utronix.de, bp@...en8.de, jroedel@...e.de,
thomas.lendacky@....com, pbonzini@...hat.com, mingo@...hat.com,
dave.hansen@...el.com, rientjes@...gle.com, seanjc@...gle.com,
peterz@...radead.org, hpa@...or.com, tony.luck@...el.com,
Brijesh Singh <brijesh.singh@....com>
Subject: [PATCH Part2 RFC v2 07/37] x86/sev: Add helper functions for RMPUPDATE and PSMASH instruction
The RMPUPDATE instruction writes a new RMP entry in the RMP Table. The
hypervisor will use the instruction to add pages to the RMP table. See
APM3 for details on the instruction operations.
The PSMASH instruction expands a 2MB RMP entry into a corresponding set of
contiguous 4KB-Page RMP entries. The hypervisor will use this instruction
to adjust the RMP entry without invalidating the previous RMP entry.
Signed-off-by: Brijesh Singh <brijesh.singh@....com>
---
arch/x86/kernel/sev.c | 42 ++++++++++++++++++++++++++++++++++++++++++
include/linux/sev.h | 27 +++++++++++++++++++++++++++
2 files changed, 69 insertions(+)
diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c
index dec4f423e232..a8a0c6cd22ca 100644
--- a/arch/x86/kernel/sev.c
+++ b/arch/x86/kernel/sev.c
@@ -1901,3 +1901,45 @@ struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level)
return entry;
}
EXPORT_SYMBOL_GPL(snp_lookup_page_in_rmptable);
+
+int psmash(struct page *page)
+{
+ unsigned long spa = page_to_pfn(page) << PAGE_SHIFT;
+ int ret;
+
+ if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP))
+ return -ENXIO;
+
+ /* Retry if another processor is modifying the RMP entry. */
+ do {
+ /* Binutils version 2.36 supports the PSMASH mnemonic. */
+ asm volatile(".byte 0xF3, 0x0F, 0x01, 0xFF"
+ : "=a"(ret)
+ : "a"(spa)
+ : "memory", "cc");
+ } while (ret == PSMASH_FAIL_INUSE);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(psmash);
+
+int rmpupdate(struct page *page, struct rmpupdate *val)
+{
+ unsigned long spa = page_to_pfn(page) << PAGE_SHIFT;
+ int ret;
+
+ if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP))
+ return -ENXIO;
+
+ /* Retry if another processor is modifying the RMP entry. */
+ do {
+ /* Binutils version 2.36 supports the RMPUPDATE mnemonic. */
+ asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFE"
+ : "=a"(ret)
+ : "a"(spa), "c"((unsigned long)val)
+ : "memory", "cc");
+ } while (ret == RMPUPDATE_FAIL_INUSE);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(rmpupdate);
diff --git a/include/linux/sev.h b/include/linux/sev.h
index ee038d466786..9855e881e542 100644
--- a/include/linux/sev.h
+++ b/include/linux/sev.h
@@ -42,13 +42,40 @@ struct __packed rmpentry {
#define X86_TO_RMP_PG_LEVEL(level) (((level) == PG_LEVEL_4K) ? RMP_PG_SIZE_4K : RMP_PG_SIZE_2M)
#define RMP_TO_X86_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M)
+/* Return code of RMPUPDATE */
+#define RMPUPDATE_SUCCESS 0
+#define RMPUPDATE_FAIL_INPUT 1
+#define RMPUPDATE_FAIL_PERMISSION 2
+#define RMPUPDATE_FAIL_INUSE 3
+#define RMPUPDATE_FAIL_OVERLAP 4
+
+struct rmpupdate {
+ u64 gpa;
+ u8 assigned;
+ u8 pagesize;
+ u8 immutable;
+ u8 rsvd;
+ u32 asid;
+} __packed;
+
+/* Return code of PSMASH */
+#define PSMASH_SUCCESS 0
+#define PSMASH_FAIL_INPUT 1
+#define PSMASH_FAIL_PERMISSION 2
+#define PSMASH_FAIL_INUSE 3
+#define PSMASH_FAIL_BADADDR 4
+
#ifdef CONFIG_AMD_MEM_ENCRYPT
struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level);
+int psmash(struct page *page);
+int rmpupdate(struct page *page, struct rmpupdate *e);
#else
static inline struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level)
{
return NULL;
}
+static inline int psmash(struct page *page) { return -ENXIO; }
+static inline int rmpupdate(struct page *page, struct rmpupdate *e) { return -ENXIO; }
#endif /* CONFIG_AMD_MEM_ENCRYPT */
#endif /* __LINUX_SEV_H */
--
2.17.1
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