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Message-ID: <20210503014336.20256-3-steven_lee@aspeedtech.com>
Date: Mon, 3 May 2021 09:43:35 +0800
From: Steven Lee <steven_lee@...eedtech.com>
To: Rob Herring <robh+dt@...nel.org>, Joel Stanley <joel@....id.au>,
"Andrew Jeffery" <andrew@...id.au>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@...ts.ozlabs.org>,
open list <linux-kernel@...r.kernel.org>
CC: <Hongweiz@....com>, <ryan_chen@...eedtech.com>,
<chin-ting_kuo@...eedtech.com>
Subject: [PATCH v2 2/3] ARM: dts: aspeed: ast2600evb: Add timing-phase property for eMMC controller
Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs.
Signed-off-by: Steven Lee <steven_lee@...eedtech.com>
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 2772796e215e..7a93317e27dc 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -102,6 +102,7 @@
&emmc_controller {
status = "okay";
+ timing-phase = <0x300FF>;
};
&emmc {
--
2.17.1
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