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Message-ID: <20210504162331.GA1122904@bjorn-Precision-5520>
Date:   Tue, 4 May 2021 11:23:31 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Leon Romanovsky <leon@...nel.org>
Cc:     Greentime Hu <greentime.hu@...ive.com>, paul.walmsley@...ive.com,
        hes@...ive.com, erik.danie@...ive.com, zong.li@...ive.com,
        bhelgaas@...gle.com, robh+dt@...nel.org, aou@...s.berkeley.edu,
        mturquette@...libre.com, sboyd@...nel.org,
        lorenzo.pieralisi@....com, p.zabel@...gutronix.de,
        alex.dewar90@...il.com, khilman@...libre.com,
        hayashi.kunihiko@...ionext.com, vidyas@...dia.com,
        jh80.chung@...sung.com, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v6 1/6] clk: sifive: Add pcie_aux clock in prci driver
 for PCIe driver

On Tue, May 04, 2021 at 03:24:19PM +0300, Leon Romanovsky wrote:
> On Tue, May 04, 2021 at 06:59:35PM +0800, Greentime Hu wrote:
> > We add pcie_aux clock in this patch so that pcie driver can use
> > clk_prepare_enable() and clk_disable_unprepare() to enable and disable
> > pcie_aux clock.
> > 
> > Signed-off-by: Greentime Hu <greentime.hu@...ive.com>
> > Acked-by: Stephen Boyd <sboyd@...nel.org>
> > ---
> >  drivers/clk/sifive/fu740-prci.c               | 11 +++++
> >  drivers/clk/sifive/fu740-prci.h               |  2 +-
> >  drivers/clk/sifive/sifive-prci.c              | 41 +++++++++++++++++++
> >  drivers/clk/sifive/sifive-prci.h              |  9 ++++
> >  include/dt-bindings/clock/sifive-fu740-prci.h |  1 +
> >  5 files changed, 63 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c
> > index 764d1097aa51..53f6e00a03b9 100644
> > --- a/drivers/clk/sifive/fu740-prci.c
> > +++ b/drivers/clk/sifive/fu740-prci.c
> > @@ -72,6 +72,12 @@ static const struct clk_ops sifive_fu740_prci_hfpclkplldiv_clk_ops = {
> >  	.recalc_rate = sifive_prci_hfpclkplldiv_recalc_rate,
> 
> <...>
> 
> > +/* PCIE AUX clock APIs for enable, disable. */
> > +int sifive_prci_pcie_aux_clock_is_enabled(struct clk_hw *hw)
> 
> It should be bool

It's used via this function pointer:

  struct clk_ops {
    int             (*is_enabled)(struct clk_hw *hw);

so I think "int" is actually appropriate here.

There are some weird/interesting bool vs int usages nearby, though:

  "bool __is_clk_gate_enabled()" goes to some trouble to convert
  int to bool ("return (reg_val & bit_mask) != 0;"), and then
  kona_peri_clk_is_enabled() converts the bool back to int ("return
  is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0;").

  "int lpc32xx_clk_gate_is_enabled()" actually returns a bool that is
  implicitly converted to int.

  Many *_is_enabled() functions return !!(...) where !! is an
  int-to-bool conversion that is arguably unnecessary and again
  results in an implicit conversion to int.

I don't see any *problems* with any of these; it just seems like a
little more mental effort to think about all the explicit and implicit
conversions going on.

> > +int sifive_prci_pcie_aux_clock_enable(struct clk_hw *hw)
> > +{
> > +	struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
> > +	struct __prci_data *pd = pc->pd;
> > +	u32 r __maybe_unused;
> > +
> > +	if (sifive_prci_pcie_aux_clock_is_enabled(hw))
> > +		return 0;
> 
> You actually call to this new function only once, put your
> __prci_readl() here.

Both sifive_prci_pcie_aux_clock_enable() and
sifive_prci_pcie_aux_clock_is_enabled() are used via the clk_ops
function pointers.

Maybe sifive_prci_pcie_aux_clock_is_enabled() could be replaced by the
__prci_readl() here, but I don't know enough about clk_ops internals
to know.

Bjorn

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