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Message-Id: <20210504174712.27675-1-Yazen.Ghannam@amd.com>
Date:   Tue,  4 May 2021 17:47:10 +0000
From:   Yazen Ghannam <Yazen.Ghannam@....com>
To:     linux-edac@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, tony.luck@...el.com, x86@...nel.org,
        Smita.KoralahalliChannabasappa@....com,
        Yazen Ghannam <yazen.ghannam@....com>
Subject: [PATCH 0/2] AMD Zen-based IF Unit Poison Quirk
From: Yazen Ghannam <yazen.ghannam@....com>
The Instruction Fetch unit on AMD Zen-based systems has a
microarchitectural quirk in which RIPV is not set on poison consumption
errors. However, the error is guaranteed to be delivered before a
context switch. Therefore, the CS register can be considered valid.
Patch 1 handles this behavior. Patch 2 addresses fallout from the change
in behavior in Patch 1.
Both patches Cc: stable because there have been bug reports that seem to
exhibit this behavior. There are no Fixes tags, because I don't think we
can point to specific commits that introduced this issue.
Thanks,
Yazen
Yazen Ghannam (2):
  x86/MCE: Always save CS register on AMD Zen IF errors
  x86/MCE: Don't call kill_me_now() directly
 arch/x86/kernel/cpu/mce/amd.c      | 17 +++++++++++++++++
 arch/x86/kernel/cpu/mce/core.c     | 12 ++++++++----
 arch/x86/kernel/cpu/mce/internal.h |  2 ++
 3 files changed, 27 insertions(+), 4 deletions(-)
-- 
2.25.1
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