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Message-ID: <20210506045115.GA767398@roeck-us.net>
Date:   Wed, 5 May 2021 21:51:15 -0700
From:   Guenter Roeck <linux@...ck-us.net>
To:     Roger Lu <roger.lu@...iatek.com>
Cc:     Matthias Brugger <matthias.bgg@...il.com>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        Kevin Hilman <khilman@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Nicolas Boichat <drinkcat@...gle.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Fan Chen <fan.chen@...iatek.com>,
        HenryC Chen <HenryC.Chen@...iatek.com>,
        YT Lee <yt.lee@...iatek.com>,
        Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
        Charles Yang <Charles.Yang@...iatek.com>,
        Angus Lin <Angus.Lin@...iatek.com>,
        Mark Rutland <mark.rutland@....com>,
        Nishanth Menon <nm@...com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v16 3/7] soc: mediatek: SVS: introduce MTK SVS engine

On Wed, Apr 28, 2021 at 02:54:36PM +0800, Roger Lu wrote:
> The Smart Voltage Scaling(SVS) engine is a piece of hardware
> which calculates suitable SVS bank voltages to OPP voltage table.
> Then, DVFS driver could apply those SVS bank voltages to PMIC/Buck
> when receiving OPP_EVENT_ADJUST_VOLTAGE.
> 
> Signed-off-by: Roger Lu <roger.lu@...iatek.com>
> ---
>  drivers/soc/mediatek/Kconfig   |   10 +
>  drivers/soc/mediatek/Makefile  |    1 +
>  drivers/soc/mediatek/mtk-svs.c | 1723 ++++++++++++++++++++++++++++++++
>  3 files changed, 1734 insertions(+)
>  create mode 100644 drivers/soc/mediatek/mtk-svs.c
> 
[ ... ]

> +
> +	svsp_irq = irq_of_parse_and_map(svsp->dev->of_node, 0);
> +	ret = devm_request_threaded_irq(svsp->dev, svsp_irq, NULL, svs_isr,
> +					svsp->irqflags, svsp->name, svsp);

0-day reports:

drivers/soc/mediatek/mtk-svs.c:1663:7-32: ERROR:
	Threaded IRQ with no primary handler requested without IRQF_ONESHOT

I would be a bit concerned about this. There is no primary (hard)
interrupt handler, meaning the hard interrupt may be re-enabled after
the default hard interrupt handler runs. This might result in endless
interrupts.

Guenter

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