[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210506111531.21978-5-sergio.paracuellos@gmail.com>
Date: Thu, 6 May 2021 13:15:30 +0200
From: Sergio Paracuellos <sergio.paracuellos@...il.com>
To: vkoul@...nel.org
Cc: linux-phy@...ts.infradead.org, kishon@...com, robh+dt@...nel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-staging@...ts.linux.dev, gregkh@...uxfoundation.org,
neil@...wn.name, ilya.lipnitskiy@...il.com
Subject: [PATCH 4/5] phy: ralink: Kconfig: enable COMPILE_TEST on mt7621-pci-phy driver
After use the clock apis and avoid custom architecture
code this driver can properly be enabled for COMPILE_TEST.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@...il.com>
---
drivers/phy/ralink/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/ralink/Kconfig b/drivers/phy/ralink/Kconfig
index ecc309ba9fee..c2373b30b8a6 100644
--- a/drivers/phy/ralink/Kconfig
+++ b/drivers/phy/ralink/Kconfig
@@ -4,7 +4,7 @@
#
config PHY_MT7621_PCI
tristate "MediaTek MT7621 PCI PHY Driver"
- depends on RALINK && OF
+ depends on (RALINK && OF) || COMPILE_TEST
select GENERIC_PHY
select REGMAP_MMIO
help
--
2.25.1
Powered by blists - more mailing lists