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Message-ID: <20210507155004.GF6383@sirena.org.uk>
Date: Fri, 7 May 2021 16:50:04 +0100
From: Mark Brown <broonie@...nel.org>
To: Pratyush Yadav <p.yadav@...com>
Cc: Tudor Ambarus <tudor.ambarus@...rochip.com>,
Michael Walle <michael@...le.cc>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-spi@...r.kernel.org
Subject: Re: [PATCH 0/6] Avoid odd length/address read/writes in 8D-8D-8D
mode.
On Fri, May 07, 2021 at 12:48:23AM +0530, Pratyush Yadav wrote:
> Patch 4 should go through the SPI tree but I have included it in this
> series because if it goes in before patches 1-3, Micron MT35XU and
> Cypress S28HS flashes will stop working correctly.
It probably makes sense to apply these to the MTD tree and then send me
a pull request to avoid any future conflicts with SPI.
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