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Date:   Sat, 08 May 2021 11:25:56 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
CC:         linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Fixes for the Merge Window, Part 2

merged tag 'riscv-for-linus-5.13-mw0'
The following changes since commit 939b7cbc00906b02c6eae6a380ad6c24c7a1e043:

  Merge tag 'riscv-for-linus-5.13-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2021-05-06 09:24:18 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.13-mw1

for you to fetch changes up to beaf5ae15a13d835a01e30c282c8325ce0f1eb7e:

  riscv: remove unused handle_exception symbol (2021-05-06 09:40:16 -0700)

----------------------------------------------------------------
RISC-V Fixes for the Merge Window, Part 2

* A fix to avoid over-allocating the kernel's mapping on !MMU systems,
  which could lead to up to 2MiB of lost memory.
* The SiFive address extension errata only manifest on rv64, they are
  now disabled on rv32 where they are unnecessary.

There are also a pair of late-landing cleanups.

----------------------------------------------------------------
Geert Uytterhoeven (2):
      riscv: Only extend kernel reservation if mapped read-only
      riscv: Consistify protect_kernel_linear_mapping_text_rodata() use

Rouven Czerwinski (1):
      riscv: remove unused handle_exception symbol

Vincent Chen (1):
      riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y

 arch/riscv/Kconfig.erratas          |  4 ++--
 arch/riscv/include/asm/set_memory.h |  7 ++++++-
 arch/riscv/kernel/setup.c           |  2 --
 arch/riscv/kernel/traps.c           |  2 --
 arch/riscv/mm/init.c                | 11 ++++++++---
 5 files changed, 16 insertions(+), 10 deletions(-)

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