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Message-ID: <20210510233749.GG1002214@nvidia.com>
Date: Mon, 10 May 2021 20:37:49 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Jacob Pan <jacob.jun.pan@...ux.intel.com>
Cc: LKML <linux-kernel@...r.kernel.org>,
iommu@...ts.linux-foundation.org, Joerg Roedel <joro@...tes.org>,
Lu Baolu <baolu.lu@...ux.intel.com>,
Jean-Philippe Brucker <jean-philippe@...aro.com>,
Christoph Hellwig <hch@...radead.org>,
Yi Liu <yi.l.liu@...el.com>, Raj Ashok <ashok.raj@...el.com>,
"Tian, Kevin" <kevin.tian@...el.com>,
Dave Jiang <dave.jiang@...el.com>, wangzhou1@...ilicon.com,
zhangfei.gao@...aro.org, vkoul@...nel.org
Subject: Re: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit
flags
On Mon, May 10, 2021 at 06:25:07AM -0700, Jacob Pan wrote:
> +/*
> + * The IOMMU_SVA_BIND_SUPERVISOR flag requests a PASID which can be used only
> + * for access to kernel addresses. No IOTLB flushes are automatically done
> + * for kernel mappings; it is valid only for access to the kernel's static
> + * 1:1 mapping of physical memory — not to vmalloc or even module mappings.
> + * A future API addition may permit the use of such ranges, by means of an
> + * explicit IOTLB flush call (akin to the DMA API's unmap method).
> + *
> + * It is unlikely that we will ever hook into flush_tlb_kernel_range() to
> + * do such IOTLB flushes automatically.
> + */
> +#define IOMMU_SVA_BIND_SUPERVISOR BIT(0)
Huh? That isn't really SVA, can you call it something saner please?
Is it really a PASID that always has all of physical memory mapped
into it? Sounds dangerous. What is it for?
Jason
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