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Message-Id: <20210510102011.520278947@linuxfoundation.org>
Date: Mon, 10 May 2021 12:19:56 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Xu Yilun <yilun.xu@...el.com>,
Tom Rix <trix@...hat.com>, Lee Jones <lee.jones@...aro.org>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.10 199/299] mfd: intel-m10-bmc: Fix the register access range
From: Xu Yilun <yilun.xu@...el.com>
[ Upstream commit d9b326b2c3673f939941806146aee38e5c635fd0 ]
This patch fixes the max register address of MAX 10 BMC. The range
0x20000000 ~ 0x200000fc are for control registers of the QSPI flash
controller, which are not accessible to host.
Signed-off-by: Xu Yilun <yilun.xu@...el.com>
Reviewed-by: Tom Rix <trix@...hat.com>
Signed-off-by: Lee Jones <lee.jones@...aro.org>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
include/linux/mfd/intel-m10-bmc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index c8ef2f1654a4..06da62c25234 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -11,7 +11,7 @@
#define M10BMC_LEGACY_SYS_BASE 0x300400
#define M10BMC_SYS_BASE 0x300800
-#define M10BMC_MEM_END 0x200000fc
+#define M10BMC_MEM_END 0x1fffffff
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0
--
2.30.2
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