linux-kernel - RE: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <DM5PR02MB38771A8BEEB3E01006B14E46BD539@DM5PR02MB3877.namprd02.prod.outlook.com>
Date:   Tue, 11 May 2021 12:38:12 +0000
From:   Sai Krishna Potthuri <lakshmis@...inx.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
CC:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Michal Simek <michals@...inx.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        git <git@...inx.com>,
        "saikrishna12468@...il.com" <saikrishna12468@...il.com>
Subject: RE: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support

Hi Andy Shevchenko,

> -----Original Message-----
> From: Sai Krishna Potthuri
> Sent: Wednesday, April 28, 2021 11:04 AM
> To: Andy Shevchenko <andy.shevchenko@...il.com>
> Cc: Linus Walleij <linus.walleij@...aro.org>; Rob Herring
> <robh+dt@...nel.org>; Michal Simek <michals@...inx.com>; Greg Kroah-
> Hartman <gregkh@...uxfoundation.org>; linux-arm Mailing List <linux-arm-
> kernel@...ts.infradead.org>; Linux Kernel Mailing List <linux-
> kernel@...r.kernel.org>; devicetree <devicetree@...r.kernel.org>; open
> list:GPIO SUBSYSTEM <linux-gpio@...r.kernel.org>; git <git@...inx.com>;
> saikrishna12468@...il.com
> Subject: RE: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
> 
> Hi Andy Shevchenko,
> 
> > -----Original Message-----
> > From: Andy Shevchenko <andy.shevchenko@...il.com>
> > Sent: Monday, April 26, 2021 7:35 PM
> > To: Sai Krishna Potthuri <lakshmis@...inx.com>
> > Cc: Linus Walleij <linus.walleij@...aro.org>; Rob Herring
> > <robh+dt@...nel.org>; Michal Simek <michals@...inx.com>; Greg Kroah-
> > Hartman <gregkh@...uxfoundation.org>; linux-arm Mailing List <linux-arm-
> > kernel@...ts.infradead.org>; Linux Kernel Mailing List <linux-
> > kernel@...r.kernel.org>; devicetree <devicetree@...r.kernel.org>; open
> > list:GPIO SUBSYSTEM <linux-gpio@...r.kernel.org>; git <git@...inx.com>;
> > saikrishna12468@...il.com
> > Subject: Re: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver
> support
...
> >
> > > > > +               ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
> > > > > +               if (arg != PM_PINCTRL_BIAS_PULL_UP)
> > > > > +                       return -EINVAL;
> > > >
> > > > Error code being shadowed. Instead check it here properly.
> >
> > > Are you mentioning the case where ret is also a non-zero?
> > > If yes, then I will update this check to
> > > if (!ret && arg != PM_PINCTRL_BIAS_PULL_UP)
> > >         return -EINVAL;
> >
> > No, this is wrong in the same way.
> >
> > > ret non-zero case, we are handling at the end of switch case.
> >
> > I meant that you need to pass the real return code to the (upper) caller.
> Here we are checking for valid argument and not the return value of the API.
> If the read value(argument) is not valid and return value of the API is
> zero (SUCCESS) then framework expects driver to be returned with
> '-EINVAL' and it is a legal error code in this case.
Do you agree on this?
I am ready with the other changes, will send out the patch to address your comments.

Regards
Sai Krishna