linux-kernel - Re: [PATCH 5.12 000/677] 5.12.4-rc1 review

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Date:   Wed, 12 May 2021 22:38:24 +0200 (CEST)
From:   "Maciej W. Rozycki" <macro@...am.me.uk>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
cc:     Naresh Kamboju <naresh.kamboju@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        open list <linux-kernel@...r.kernel.org>,
        Shuah Khan <shuah@...nel.org>,
        Florian Fainelli <f.fainelli@...il.com>, patches@...nelci.org,
        lkft-triage@...ts.linaro.org, Jon Hunter <jonathanh@...dia.com>,
        linux-stable <stable@...r.kernel.org>,
        Pavel Machek <pavel@...x.de>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Guenter Roeck <linux@...ck-us.net>,
        clang-built-linux <clang-built-linux@...glegroups.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Huacai Chen <chenhuacai@...nel.org>
Subject: Re: [PATCH 5.12 000/677] 5.12.4-rc1 review

On Wed, 12 May 2021, Linus Torvalds wrote:

> Note that this might just be a random effect of inlining or other
> register allocation pressure details.
> 
> So it's possible that upstream builds mostly by luck.
> 
> The "couldn't allocate output register" thing really does seem more
> like a compiler issue than a kernel source code issue.

 Nope, `x' is the constraint for the multiply-divide unit/MDU accumulator 
register used for calculation output; there's only one, comprised of the 
HI and LO parts.  This register was removed as from the MIPSr6 ISA, which 
I forgot that we support (unlike the microMIPSr6 ISA), in favour to using 
regular GPRs, in a slightly different manner.

 Rather than cluttering code with #ifdefs for the updated MIPSr6 divide 
and modulo instructions I chose to rewrite this piece in plain C, which 
actually makes pre-MIPSr6 code slightly better owing to better instruction 
scheduling (the pre-MIPSr6 MDU runs asynchronously and its output is only 
interlocked on read access to the accumulator register).

 NB I don't know if Clang actually supports the `x' constraint even with 
pre-MIPSr6 code; as it has turned out it has deficiencies compared to GCC 
with inline asm handling with the MIPS target.  OTOH GCC has supported it 
since ~1991 if memory serves me, when MIPS support was initially added.

  Maciej