linux-kernel - [PATCH v5 2/4] dt-bindings: fpga: Add binding doc for versal fpga manager

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20210512125042.30973-3-nava.manne@xilinx.com>
Date:   Wed, 12 May 2021 18:20:40 +0530
From:   Nava kishore Manne <nava.manne@...inx.com>
To:     <robh+dt@...nel.org>, <michal.simek@...inx.com>, <mdf@...nel.org>,
        <trix@...hat.com>, <nava.manne@...inx.com>, <arnd@...db.de>,
        <rajan.vaja@...inx.com>, <gregkh@...uxfoundation.org>,
        <amit.sunil.dhamne@...inx.com>, <tejas.patel@...inx.com>,
        <zou_wei@...wei.com>, <lakshmi.sai.krishna.potthuri@...inx.com>,
        <ravi.patel@...inx.com>, <iwamatsu@...auri.org>,
        <wendy.liang@...inx.com>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-fpga@...r.kernel.org>,
        <git@...inx.com>, <chinnikishore369@...il.com>
CC:     Appana Durga Kedareswara rao <appana.durga.rao@...inx.com>
Subject: [PATCH v5 2/4] dt-bindings: fpga: Add binding doc for versal fpga manager

From: Appana Durga Kedareswara rao <appana.durga.rao@...inx.com>

This patch adds binding doc for versal fpga manager driver.

Signed-off-by: Nava kishore Manne <nava.manne@...inx.com>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@...inx.com>
---
Changes for v2:
                -Fixed file format and syntax issues.
Changes for v3:
                -Removed unwated extra spaces.
Changes for v4:
                -Rebased the changes on linux-next.
                 No functional changes
Changes for v5:
                -Updated fpga node name to versal_fpga.

 .../bindings/fpga/xlnx,versal-fpga.yaml       | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml

diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
new file mode 100644
index 000000000000..ac6a207278d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Versal FPGA driver.
+
+maintainers:
+  - Nava kishore Manne <nava.manne@...inx.com>
+
+description: |
+  Device Tree Versal FPGA bindings for the Versal SoC, controlled
+  using firmware interface.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - xlnx,versal-fpga
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    versal_fpga: versal_fpga {
+         compatible = "xlnx,versal-fpga";
+    };
+
+...
-- 
2.17.1