KERNEL SELFTESTS: linux_headers_dir is /usr/src/linux-headers-x86_64-rhel-8.3-kselftests-55b7c6747c4628ec8f5b544424d0823aa017294b 2021-05-11 13:26:19 ln -sf /usr/bin/clang 2021-05-11 13:26:19 ln -sf /usr/bin/llc 2021-05-11 13:26:19 sed -i s/default_timeout=45/default_timeout=300/ kselftest/runner.sh 2021-05-11 13:26:19 sed -i s/default_timeout=45/default_timeout=300/ /kselftests/kselftest/runner.sh source /lkp/lkp/src/lib/tests/kernel-selftests-ext.sh 2021-05-11 13:26:19 /kselftests/run_kselftest.sh -c x86 TAP version 13 1..38 # selftests: x86: single_step_syscall_32 # [RUN] Set TF and check nop # [OK] Survived with TF set and 15 traps # [RUN] Set TF and check int80 # [OK] Survived with TF set and 14 traps # [RUN] Set TF and check a fast syscall # [OK] Survived with TF set and 45 traps # [RUN] Fast syscall with TF cleared # [OK] Nothing unexpected happened # [RUN] Set TF and check SYSENTER # Got SIGSEGV with RIP=f7f4c549, TF=256 # [RUN] Fast syscall with TF cleared # [OK] Nothing unexpected happened ok 1 selftests: x86: single_step_syscall_32 # selftests: x86: sysret_ss_attrs_32 # [RUN] Syscalls followed by SS validation # [OK] We survived ok 2 selftests: x86: sysret_ss_attrs_32 # selftests: x86: syscall_nt_32 # [RUN] Set NT and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set AC and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set NT|AC and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set NT|TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set AC|TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set NT|AC|TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set DF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set TF|DF and issue a syscall # [OK] The syscall worked and flags are still set ok 3 selftests: x86: syscall_nt_32 # selftests: x86: test_mremap_vdso_32 # AT_SYSINFO_EHDR is 0xf7f4a000 # [NOTE] Moving vDSO: [0xf7f4a000, 0xf7f4b000] -> [0xf7f73000, 0xf7f74000] # [NOTE] vDSO partial move failed, will try with bigger size # [NOTE] Moving vDSO: [0xf7f4a000, 0xf7f4c000] -> [0xf7f42000, 0xf7f44000] # [OK] ok 4 selftests: x86: test_mremap_vdso_32 # selftests: x86: check_initial_reg_state_32 # [OK] All GPRs except SP are 0 # [OK] FLAGS is 0x202 ok 5 selftests: x86: check_initial_reg_state_32 # selftests: x86: sigreturn_32 # [OK] set_thread_area refused 16-bit data # [OK] set_thread_area refused 16-bit data # [RUN] Valid sigreturn: 64-bit CS (33), 32-bit SS (2b, GDT) # [OK] all registers okay # [RUN] Valid sigreturn: 32-bit CS (23), 32-bit SS (2b, GDT) # [OK] all registers okay # [RUN] Valid sigreturn: 16-bit CS (37), 32-bit SS (2b, GDT) # [OK] all registers okay # [RUN] Valid sigreturn: 64-bit CS (33), 16-bit SS (3f) # [OK] all registers okay # [RUN] Valid sigreturn: 32-bit CS (23), 16-bit SS (3f) # [OK] all registers okay # [RUN] Valid sigreturn: 16-bit CS (37), 16-bit SS (3f) # [OK] all registers okay # [RUN] 64-bit CS (33), bogus SS (47) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] 32-bit CS (23), bogus SS (47) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] 16-bit CS (37), bogus SS (47) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] 64-bit CS (33), bogus SS (23) # [OK] Got #GP(0x20) (i.e. GDT index 4, Segmentation fault) # [RUN] 32-bit CS (23), bogus SS (23) # [OK] Got #GP(0x20) (i.e. GDT index 4, Segmentation fault) # [RUN] 16-bit CS (37), bogus SS (23) # [OK] Got #GP(0x20) (i.e. GDT index 4, Segmentation fault) # [RUN] 32-bit CS (4f), bogus SS (2b) # [OK] Got #NP(0x4c) (i.e. LDT index 9, Bus error) # [RUN] 32-bit CS (23), bogus SS (57) # [OK] Got #GP(0x0) (i.e. Segmentation fault) ok 6 selftests: x86: sigreturn_32 # selftests: x86: iopl_32 # [OK] CLI faulted # [OK] STI faulted # [OK] outb to 0x80 worked # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # child: set IOPL to 3 # [RUN] child: write to 0x80 # [OK] CLI faulted # [OK] STI faulted # [OK] outb to 0x80 worked # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [OK] Child succeeded # [RUN] parent: write to 0x80 (should fail) # [OK] outb to 0x80 failed # [OK] CLI faulted # [OK] STI faulted # iopl(3) # Drop privileges # [RUN] iopl(3) unprivileged but with IOPL==3 # [RUN] iopl(0) unprivileged # [RUN] iopl(3) unprivileged # [OK] Failed as expected ok 7 selftests: x86: iopl_32 # selftests: x86: ioperm_32 # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [RUN] enable 0x80 # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [RUN] disable 0x80 # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [RUN] child: check that we inherited permissions # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [RUN] child: Extend permissions to 0x81 # [RUN] child: Drop permissions to 0x80 # [OK] outb to 0x80 failed # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [RUN] enable 0x80 # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [RUN] disable 0x80 # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [OK] Child succeeded # Verify that unsharing the bitmap worked # [OK] outb to 0x80 worked # Drop privileges # [RUN] disable 0x80 # [OK] it worked # [RUN] enable 0x80 again # [OK] it failed ok 8 selftests: x86: ioperm_32 # selftests: x86: test_vsyscall_32 # [NOTE] failed to find getcpu in vDSO # [RUN] test gettimeofday() # vDSO time offsets: 0.000014 0.000001 # [OK] vDSO gettimeofday()'s timeval was okay # [RUN] test time() # [OK] vDSO time() is okay # [RUN] getcpu() on CPU 0 # [RUN] getcpu() on CPU 1 ok 9 selftests: x86: test_vsyscall_32 # selftests: x86: mov_ss_trap_32 # SS = 0x2b, &SS = 0x0x804e11c # PR_SET_PTRACER_ANY succeeded # Set up a watchpoint # DR0 = 804e11c, DR1 = 80493b4, DR7 = 7000a # SS = 0x2b, &SS = 0x0x804e11c # PR_SET_PTRACER_ANY succeeded # Set up a watchpoint # [RUN] Read from watched memory (should get SIGTRAP) # Got SIGTRAP with RIP=804920a, EFLAGS.RF=0 # [RUN] MOV SS; INT3 # Got SIGTRAP with RIP=804921b, EFLAGS.RF=0 # [RUN] MOV SS; INT 3 # Got SIGTRAP with RIP=804922d, EFLAGS.RF=0 # [RUN] MOV SS; CS CS INT3 # Got SIGTRAP with RIP=8049240, EFLAGS.RF=0 # [RUN] MOV SS; CSx14 INT3 # Got SIGTRAP with RIP=804925f, EFLAGS.RF=0 # [RUN] MOV SS; INT 4 # Got SIGSEGV with RIP=8049289 # [RUN] MOV SS; INTO # Got SIGTRAP with RIP=80492b9, EFLAGS.RF=0 # [RUN] MOV SS; ICEBP # Got SIGTRAP with RIP=8049304, EFLAGS.RF=0 # [RUN] MOV SS; CLI # Got SIGSEGV with RIP=8049611 # [RUN] MOV SS; #PF # Got SIGSEGV with RIP=80495d3 # [RUN] MOV SS; INT 1 # Got SIGSEGV with RIP=8049394 # [RUN] MOV SS; breakpointed NOP # Got SIGTRAP with RIP=80493b5, EFLAGS.RF=0 # [RUN] MOV SS; SYSENTER # Got SIGSEGV with RIP=f7f96549 # [RUN] MOV SS; INT $0x80 # [OK] I aten't dead ok 10 selftests: x86: mov_ss_trap_32 # selftests: x86: syscall_arg_fault_32 # [RUN] SYSENTER with invalid state # [OK] Seems okay # [RUN] SYSCALL with invalid state # [SKIP] Illegal instruction # [RUN] SYSENTER with TF and invalid state # [OK] Seems okay # [RUN] SYSCALL with TF and invalid state # [SKIP] Illegal instruction ok 11 selftests: x86: syscall_arg_fault_32 # selftests: x86: fsgsbase_restore_32 # Setting up a segment # segment base address = 0xf7f1c000 # using LDT slot 0 # [OK] The segment points to the right place. # Tracee will take a nap until signaled # Tracee: in tracee_zap_segment() # Tracee is going back to sleep # Tracee was resumed. Will re-check segment. # [OK] The segment points to the right place. # Setting up a segment # segment base address = 0xf7f1c000 # using LDT slot 0 # [OK] The segment points to the right place. # Child FS=0x7 # Tracer: redirecting tracee to tracee_zap_segment() # Tracer: restoring tracee state # [OK] All is well. ok 12 selftests: x86: fsgsbase_restore_32 # selftests: x86: entry_from_vm86_32 # [RUN] #BR from vm86 mode # [SKIP] vm86 not supported # [RUN] SYSENTER from vm86 mode # [SKIP] vm86 not supported # [RUN] SYSCALL from vm86 mode # [SKIP] vm86 not supported # [RUN] STI with VIP set from vm86 mode # [SKIP] vm86 not supported # [RUN] POPF with VIP set and IF clear from vm86 mode # [SKIP] vm86 not supported # [RUN] POPF with VIP and IF set from vm86 mode # [SKIP] vm86 not supported # [RUN] POPF with VIP clear and IF set from vm86 mode # [SKIP] vm86 not supported # [RUN] INT3 from vm86 mode # [SKIP] vm86 not supported # [RUN] int80 from vm86 mode # [SKIP] vm86 not supported # [RUN] UMIP tests from vm86 mode # [SKIP] vm86 not supported # [INFO] Result from SMSW:[0x0000] # [INFO] Result from SIDT: limit[0x0000]base[0x00000000] # [INFO] Result from SGDT: limit[0x0000]base[0x00000000] # [PASS] All the results from SMSW are identical. # [PASS] All the results from SGDT are identical. # [PASS] All the results from SIDT are identical. # [RUN] STR instruction from vm86 mode # [SKIP] vm86 not supported # [RUN] SLDT instruction from vm86 mode # [SKIP] vm86 not supported # [RUN] Execute null pointer from vm86 mode # [SKIP] vm86 not supported # [RUN] #BR from vm86 mode # [SKIP] vm86 not supported # [RUN] SYSENTER from vm86 mode # [SKIP] vm86 not supported # [RUN] SYSCALL from vm86 mode # [SKIP] vm86 not supported # [RUN] STI with VIP set from vm86 mode # [SKIP] vm86 not supported # [RUN] POPF with VIP set and IF clear from vm86 mode # [SKIP] vm86 not supported # [RUN] POPF with VIP and IF set from vm86 mode # [SKIP] vm86 not supported # [RUN] POPF with VIP clear and IF set from vm86 mode # [SKIP] vm86 not supported # [RUN] INT3 from vm86 mode # [SKIP] vm86 not supported # [RUN] int80 from vm86 mode # [SKIP] vm86 not supported # [RUN] UMIP tests from vm86 mode # [SKIP] vm86 not supported # [INFO] Result from SMSW:[0x0000] # [INFO] Result from SIDT: limit[0x0000]base[0x00000000] # [INFO] Result from SGDT: limit[0x0000]base[0x00000000] # [PASS] All the results from SMSW are identical. # [PASS] All the results from SGDT are identical. # [PASS] All the results from SIDT are identical. # [RUN] STR instruction from vm86 mode # [SKIP] vm86 not supported # [RUN] SLDT instruction from vm86 mode # [SKIP] vm86 not supported # [RUN] Execute null pointer from vm86 mode # [SKIP] vm86 not supported ok 13 selftests: x86: entry_from_vm86_32 # selftests: x86: test_syscall_vdso_32 # [RUN] Executing 6-argument 32-bit syscall via VDSO # [WARN] Flags before=0000000000200ed7 id 0 00 o d i s z 0 a 0 p 1 c # [WARN] Flags after=0000000000200682 id 0 00 d i s 0 0 1 # [WARN] Flags change=0000000000000855 0 00 o z 0 a 0 p 0 c # [OK] Arguments are preserved across syscall # [NOTE] R11 has changed:0000000000200682 - assuming clobbered by SYSRET insn # [OK] R8..R15 did not leak kernel data # [RUN] Executing 6-argument 32-bit syscall via INT 80 # [OK] Arguments are preserved across syscall # [OK] R8..R15 did not leak kernel data # [RUN] Executing 6-argument 32-bit syscall via VDSO # [WARN] Flags before=0000000000200ed7 id 0 00 o d i s z 0 a 0 p 1 c # [WARN] Flags after=0000000000200686 id 0 00 d i s 0 0 p 1 # [WARN] Flags change=0000000000000851 0 00 o z 0 a 0 0 c # [OK] Arguments are preserved across syscall # [NOTE] R11 has changed:0000000000200686 - assuming clobbered by SYSRET insn # [OK] R8..R15 did not leak kernel data # [RUN] Executing 6-argument 32-bit syscall via INT 80 # [OK] Arguments are preserved across syscall # [OK] R8..R15 did not leak kernel data # [RUN] Running tests under ptrace ok 14 selftests: x86: test_syscall_vdso_32 # selftests: x86: unwind_vdso_32 # AT_SYSINFO is 0xf7f71540 # [OK] AT_SYSINFO maps to linux-gate.so.1, loaded at 0x0xf7f71000 # [RUN] Set TF and check a fast syscall # In vsyscall at 0xf7f71540, returning to 0xf7e35687 # SIGTRAP at 0xf7f71540 # 0xf7f71540 # 0xf7e35687 # [OK] NR = 20, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f71541 # 0xf7f71541 # 0xf7e35687 # [OK] NR = 20, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f71542 # 0xf7f71542 # 0xf7e35687 # [OK] NR = 20, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f71543 # 0xf7f71543 # 0xf7e35687 # [OK] NR = 20, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f71545 # 0xf7f71545 # 0xf7e35687 # [OK] NR = 20, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f7154a # 0xf7f7154a # 0xf7e35687 # [OK] NR = 1459, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f7154b # 0xf7f7154b # 0xf7e35687 # [OK] NR = 1459, args = 1, 2, 3, 4, 5, 6 # SIGTRAP at 0xf7f7154c # 0xf7f7154c # 0xf7e35687 # [OK] NR = 1459, args = 1, 2, 3, 4, 5, 6 # Vsyscall is done # [OK] All is well ok 15 selftests: x86: unwind_vdso_32 # selftests: x86: test_FCMOV_32 # [RUN] Testing fcmovCC instructions # [OK] fcmovCC ok 16 selftests: x86: test_FCMOV_32 # selftests: x86: test_FCOMI_32 # [RUN] Testing f[u]comi[p] instructions # [OK] f[u]comi[p] ok 17 selftests: x86: test_FCOMI_32 # selftests: x86: test_FISTTP_32 # [RUN] Testing fisttp instructions # [OK] fisttp ok 18 selftests: x86: test_FISTTP_32 # selftests: x86: vdso_restorer_32 # [RUN] Raise a signal, SA_SIGINFO, sa.restorer == NULL # [OK] SA_SIGINFO handler returned successfully # [RUN] Raise a signal, !SA_SIGINFO, sa.restorer == NULL # [OK] !SA_SIGINFO handler returned successfully ok 19 selftests: x86: vdso_restorer_32 # selftests: x86: ldt_gdt_32 # [NOTE] set_thread_area is available; will use GDT index 13 # [OK] LDT entry 0 has AR 0x0040FB00 and limit 0x0000000A # [OK] LDT entry 0 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00907B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07300 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07100 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07500 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00507700 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507F00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507D00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507B00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [RUN] Test fork # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [OK] LDT entry 1 is invalid # [OK] LDT entry 0 is invalid # [NOTE] set_thread_area is available; will use GDT index 13 # [OK] LDT entry 0 has AR 0x0040FB00 and limit 0x0000000A # [OK] LDT entry 0 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00907B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07300 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07100 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07500 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00507700 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507F00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507D00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507B00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [RUN] Test fork # [OK] Child succeeded # [RUN] Test size # [DONE] Size test # [OK] modify_ldt failure 22 # [OK] LDT entry 0 has AR 0x0000F300 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x00007300 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x0000F100 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x00007300 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x00007100 and limit 0x00000001 # [OK] LDT entry 0 has AR 0x00007100 and limit 0x00000000 # [OK] LDT entry 0 is invalid # [OK] LDT entry 0 has AR 0x0040F300 and limit 0x000FFFFF # [OK] GDT entry 13 has AR 0x0040F300 and limit 0x000FFFFF # [OK] LDT entry 0 has AR 0x00C0F300 and limit 0xFFFFFFFF # [OK] GDT entry 13 has AR 0x00C0F300 and limit 0xFFFFFFFF # [OK] LDT entry 0 has AR 0x00C0F100 and limit 0xFFFFFFFF # [OK] GDT entry 13 has AR 0x00C0F100 and limit 0xFFFFFFFF # [OK] LDT entry 0 has AR 0x00C0F700 and limit 0xFFFFFFFF # [OK] GDT entry 13 has AR 0x00C0F700 and limit 0xFFFFFFFF # [OK] LDT entry 0 has AR 0x00C0F500 and limit 0xFFFFFFFF # [OK] GDT entry 13 has AR 0x00C0F500 and limit 0xFFFFFFFF # [OK] LDT entry 0 is invalid # [RUN] Cross-CPU LDT invalidation # [OK] All 5 iterations succeeded # [RUN] Test exec # [OK] LDT entry 0 has AR 0x0040FB00 and limit 0x0000002A # [OK] Child succeeded # [OK] Invalidate DS with set_thread_area: new DS = 0x0 # [OK] Invalidate ES with set_thread_area: new ES = 0x0 # [OK] Invalidate FS with set_thread_area: new FS = 0x0 # [OK] Invalidate GS with set_thread_area: new GS = 0x0 ok 20 selftests: x86: ldt_gdt_32 # selftests: x86: ptrace_syscall_32 # [RUN] Check int80 return regs # [OK] getpid() preserves regs # [OK] kill(getpid(), SIGUSR1) preserves regs # [RUN] Check AT_SYSINFO return regs # [OK] getpid() preserves regs # [OK] kill(getpid(), SIGUSR1) preserves regs # [RUN] ptrace-induced syscall restart # [RUN] SYSEMU # [OK] Initial nr and args are correct # [RUN] Restart the syscall (ip = 0xf7ed9549) # [OK] Restarted nr and args are correct # [RUN] Change nr and args and restart the syscall (ip = 0xf7ed9549) # [OK] Replacement nr and args are correct # [OK] Child exited cleanly # [RUN] kernel syscall restart under ptrace # [RUN] SYSCALL # [OK] Initial nr and args are correct # [RUN] SYSCALL # [OK] Args after SIGUSR1 are correct (ax = -514) # [OK] Child got SIGUSR1 # [RUN] Step again # [OK] pause(2) restarted correctly ok 21 selftests: x86: ptrace_syscall_32 # selftests: x86: single_step_syscall_64 # [RUN] Set TF and check nop # [OK] Survived with TF set and 10 traps # [RUN] Set TF and check syscall-less opportunistic sysret # [OK] Survived with TF set and 12 traps # [RUN] Set TF and check int80 # [OK] Survived with TF set and 9 traps # [RUN] Set TF and check a fast syscall # [OK] Survived with TF set and 22 traps # [RUN] Fast syscall with TF cleared # [OK] Nothing unexpected happened # [RUN] Set TF and check SYSENTER # Got SIGSEGV with RIP=a4fab549, TF=256 # [RUN] Fast syscall with TF cleared # [OK] Nothing unexpected happened ok 22 selftests: x86: single_step_syscall_64 # selftests: x86: sysret_ss_attrs_64 # [RUN] Syscalls followed by SS validation # [OK] We survived ok 23 selftests: x86: sysret_ss_attrs_64 # selftests: x86: syscall_nt_64 # [RUN] Set NT and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set AC and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set NT|AC and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set NT|TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set AC|TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set NT|AC|TF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set DF and issue a syscall # [OK] The syscall worked and flags are still set # [RUN] Set TF|DF and issue a syscall # [OK] The syscall worked and flags are still set ok 24 selftests: x86: syscall_nt_64 # selftests: x86: test_mremap_vdso_64 # AT_SYSINFO_EHDR is 0x7ffeb5d95000 # [NOTE] Moving vDSO: [0x7ffeb5d95000, 0x7ffeb5d96000] -> [0x7f7a71f04000, 0x7f7a71f05000] # [NOTE] vDSO partial move failed, will try with bigger size # [NOTE] Moving vDSO: [0x7ffeb5d95000, 0x7ffeb5d97000] -> [0x7f7a71f03000, 0x7f7a71f05000] # [OK] ok 25 selftests: x86: test_mremap_vdso_64 # selftests: x86: check_initial_reg_state_64 # [OK] All GPRs except SP are 0 # [OK] FLAGS is 0x202 ok 26 selftests: x86: check_initial_reg_state_64 # selftests: x86: sigreturn_64 # [OK] set_thread_area refused 16-bit data # [OK] set_thread_area refused 16-bit data # [RUN] Valid sigreturn: 64-bit CS (33), 32-bit SS (2b, GDT) # [OK] all registers okay # [RUN] Valid sigreturn: 32-bit CS (23), 32-bit SS (2b, GDT) # [NOTE] SP: 8badf00d5aadc0de -> 5aadc0de # [OK] all registers okay # [RUN] Valid sigreturn: 16-bit CS (37), 32-bit SS (2b, GDT) # [NOTE] SP: 8badf00d5aadc0de -> 5aadc0de # [OK] all registers okay # [RUN] Valid sigreturn: 64-bit CS (33), 16-bit SS (3f) # [OK] all registers okay # [RUN] Valid sigreturn: 32-bit CS (23), 16-bit SS (3f) # [NOTE] SP: 8badf00d5aadc0de -> 5aadc0de # [OK] all registers okay # [RUN] Valid sigreturn: 16-bit CS (37), 16-bit SS (3f) # [NOTE] SP: 8badf00d5aadc0de -> 5aadc0de # [OK] all registers okay # [RUN] Valid sigreturn: 32-bit CS (23), 32-bit SS (2b, GDT) # Corrupting SS on return to 64-bit mode # [NOTE] SP: 8badf00d5aadc0de -> 5aadc0de # [OK] all registers okay # [RUN] Valid sigreturn: 32-bit CS (23), 16-bit SS (3f) # Corrupting SS on return to 64-bit mode # [NOTE] SP: 8badf00d5aadc0de -> 5aadc0de # [OK] all registers okay # [RUN] 64-bit CS (33), bogus SS (47) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] 32-bit CS (23), bogus SS (47) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] 16-bit CS (37), bogus SS (47) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] 64-bit CS (33), bogus SS (33) # [OK] Got #GP(0x30) (i.e. GDT index 6, Segmentation fault) # [RUN] 32-bit CS (23), bogus SS (33) # [OK] Got #GP(0x30) (i.e. GDT index 6, Segmentation fault) # [RUN] 16-bit CS (37), bogus SS (33) # [OK] Got #GP(0x30) (i.e. GDT index 6, Segmentation fault) # [RUN] 32-bit CS (4f), bogus SS (2b) # [OK] Got #NP(0x4c) (i.e. LDT index 9, Bus error) # [RUN] 32-bit CS (23), bogus SS (57) # [OK] Got #GP(0x0) (i.e. Segmentation fault) # [RUN] Clear UC_STRICT_RESTORE_SS and corrupt SS # [OK] It worked ok 27 selftests: x86: sigreturn_64 # selftests: x86: iopl_64 # [OK] CLI faulted # [OK] STI faulted # [OK] outb to 0x80 worked # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # child: set IOPL to 3 # [RUN] child: write to 0x80 # [OK] CLI faulted # [OK] STI faulted # [OK] outb to 0x80 worked # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [OK] Child succeeded # [RUN] parent: write to 0x80 (should fail) # [OK] outb to 0x80 failed # [OK] CLI faulted # [OK] STI faulted # iopl(3) # Drop privileges # [RUN] iopl(3) unprivileged but with IOPL==3 # [RUN] iopl(0) unprivileged # [RUN] iopl(3) unprivileged # [OK] Failed as expected ok 28 selftests: x86: iopl_64 # selftests: x86: ioperm_64 # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [RUN] enable 0x80 # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [RUN] disable 0x80 # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [RUN] child: check that we inherited permissions # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [RUN] child: Extend permissions to 0x81 # [RUN] child: Drop permissions to 0x80 # [OK] outb to 0x80 failed # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [RUN] enable 0x80 # [OK] outb to 0x80 worked # [OK] outb to 0xed failed # [RUN] disable 0x80 # [OK] outb to 0x80 failed # [OK] outb to 0xed failed # [OK] Child succeeded # Verify that unsharing the bitmap worked # [OK] outb to 0x80 worked # Drop privileges # [RUN] disable 0x80 # [OK] it worked # [RUN] enable 0x80 again # [OK] it failed ok 29 selftests: x86: ioperm_64 # selftests: x86: test_vsyscall_64 # vsyscall map: ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall] # vsyscall permissions are r-x # [RUN] test gettimeofday() # vDSO time offsets: 0.000012 0.000004 # [OK] vDSO gettimeofday()'s timeval was okay # vsyscall time offsets: 0.000014 0.000002 # [OK] vsyscall gettimeofday()'s timeval was okay # [RUN] test time() # [OK] vDSO time() is okay # [OK] vsyscall time() is okay # [RUN] getcpu() on CPU 0 # [OK] vDSO reported correct CPU # [OK] vDSO reported correct node # [OK] vsyscall reported correct CPU # [OK] vsyscall reported correct node # [RUN] getcpu() on CPU 1 # [OK] vDSO reported correct CPU # [OK] vDSO reported correct node # [OK] vsyscall reported correct CPU # [OK] vsyscall reported correct node # [RUN] Checking read access to the vsyscall page # [OK] We have read access # [RUN] process_vm_readv() from vsyscall page # [OK] It worked and read correct data # [RUN] checking that vsyscalls are emulated # [OK] vsyscalls are emulated (1 instructions in vsyscall page) ok 30 selftests: x86: test_vsyscall_64 # selftests: x86: mov_ss_trap_64 # SS = 0x2b, &SS = 0x0x406188 # PR_SET_PTRACER_ANY succeeded # Set up a watchpoint # DR0 = 406188, DR1 = 40133a, DR7 = 7000a # SS = 0x2b, &SS = 0x0x406188 # PR_SET_PTRACER_ANY succeeded # Set up a watchpoint # [RUN] Read from watched memory (should get SIGTRAP) # Got SIGTRAP with RIP=4011ca, EFLAGS.RF=0 # [RUN] MOV SS; INT3 # Got SIGTRAP with RIP=4011dd, EFLAGS.RF=0 # [RUN] MOV SS; INT 3 # Got SIGTRAP with RIP=4011f1, EFLAGS.RF=0 # [RUN] MOV SS; CS CS INT3 # Got SIGTRAP with RIP=401206, EFLAGS.RF=0 # [RUN] MOV SS; CSx14 INT3 # Got SIGTRAP with RIP=401227, EFLAGS.RF=0 # [RUN] MOV SS; INT 4 # Got SIGSEGV with RIP=401251 # [RUN] MOV SS; ICEBP # Got SIGTRAP with RIP=40128f, EFLAGS.RF=0 # [RUN] MOV SS; CLI # Got SIGSEGV with RIP=40158c # [RUN] MOV SS; #PF # Got SIGSEGV with RIP=401557 # [RUN] MOV SS; INT 1 # Got SIGSEGV with RIP=401528 # [RUN] MOV SS; SYSCALL # [RUN] MOV SS; breakpointed NOP # Got SIGTRAP with RIP=40133b, EFLAGS.RF=0 # [RUN] MOV SS; SYSENTER # Got SIGSEGV with RIP=e452b549 # [RUN] MOV SS; INT $0x80 # [OK] I aten't dead ok 31 selftests: x86: mov_ss_trap_64 # selftests: x86: syscall_arg_fault_64 # [RUN] SYSENTER with invalid state # [OK] Seems okay # [RUN] SYSCALL with invalid state # [OK] SYSCALL returned normally # [RUN] SYSENTER with TF and invalid state # [OK] Seems okay # [RUN] SYSCALL with TF and invalid state # [OK] SYSCALL returned normally # [RUN] SYSENTER with TF, invalid state, and GSBASE < 0 # [OK] Seems okay ok 32 selftests: x86: syscall_arg_fault_64 # selftests: x86: fsgsbase_restore_64 # Setting up a segment # segment base address = 0x41738000 # using LDT slot 0 # [OK] The segment points to the right place. # Tracee will take a nap until signaled # Tracee: in tracee_zap_segment() # Tracee is going back to sleep # Tracee was resumed. Will re-check segment. # [OK] The segment points to the right place. # Setting up a segment # segment base address = 0x41738000 # using LDT slot 0 # [OK] The segment points to the right place. # Child GS=0x7, GSBASE=0x41738000 # Tracer: redirecting tracee to tracee_zap_segment() # Tracer: restoring tracee state # [OK] All is well. ok 33 selftests: x86: fsgsbase_restore_64 # selftests: x86: fsgsbase_64 # [OK] GSBASE started at 1 # [RUN] Set GS = 0x7, read GSBASE # [OK] GSBASE reads as 0x1 with invalid GS # FSGSBASE instructions are enabled # [RUN] ARCH_SET_GS to 0x0 # [OK] GSBASE was set as expected (selector 0x0) # [OK] ARCH_GET_GS worked as expected (selector 0x0) # [RUN] ARCH_SET_GS to 0x1 # [OK] GSBASE was set as expected (selector 0x0) # [OK] ARCH_GET_GS worked as expected (selector 0x0) # [RUN] ARCH_SET_GS to 0x200000000 # [OK] GSBASE was set as expected (selector 0x0) # [OK] ARCH_GET_GS worked as expected (selector 0x0) # [RUN] ARCH_SET_GS to 0x0 # [OK] GSBASE was set as expected (selector 0x0) # [OK] ARCH_GET_GS worked as expected (selector 0x0) # [RUN] ARCH_SET_GS to 0x200000000 # [OK] GSBASE was set as expected (selector 0x0) # [OK] ARCH_GET_GS worked as expected (selector 0x0) # [RUN] ARCH_SET_GS to 0x1 # [OK] GSBASE was set as expected (selector 0x0) # [OK] ARCH_GET_GS worked as expected (selector 0x0) # [RUN] ARCH_SET_GS to 0x0 then mov 0 to %gs # [OK] GSBASE is 0x0 # [RUN] ARCH_SET_GS to 0x1 then mov 0 to %gs # [OK] GSBASE is 0x0 # [RUN] ARCH_SET_GS to 0x200000000 then mov 0 to %gs # [OK] GSBASE is 0x0 # [RUN] ARCH_SET_GS to 0x0 then mov 0 to %gs and schedule # [OK] GSBASE is 0x0 # [RUN] ARCH_SET_GS to 0x1 then mov 0 to %gs and schedule # [OK] GSBASE is 0x0 # [RUN] ARCH_SET_GS to 0x200000000 then mov 0 to %gs and schedule # [OK] GSBASE is 0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x0 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x0 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x0 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x0 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x0 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0xa1fa5f343cb85fa4 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x1 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x1 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x1 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x1 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x200000000 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x200000000 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x200000000 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x200000000 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0), then schedule to 0x200000000 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x0 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x0 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x0 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x0 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x0 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0xa1fa5f343cb85fa4 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x1 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x1 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x1 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x1 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x200000000 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x200000000 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x200000000 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x200000000 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x0) and clear gs, then schedule to 0x200000000 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x0 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x1 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x0 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x0 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x0 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x0 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0xa1fa5f343cb85fa4 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x1 # [RUN] ARCH_SET_GS(0x1), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x1 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x1 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x1 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x1 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x1 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x200000000 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x1 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x200000000 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x200000000 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x200000000 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x1), then schedule to 0x200000000 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x0 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x200000000 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x0 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x0 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x0 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x0 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0xa1fa5f343cb85fa4 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x200000000 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0xa1fa5f343cb85fa4 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x0) and clear gs -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x200000000 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x1 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x1 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x1 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x1 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x1) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x200000000 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x0/0x200000000 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x200000000 # Before schedule, set selector to 0x1 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x1/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x200000000 # Before schedule, set selector to 0x2 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x200000000 # Before schedule, set selector to 0x3 # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x3/0x0 # [RUN] ARCH_SET_GS(0x200000000), then schedule to 0x200000000 # Before schedule, set selector to 0x2b # other thread: ARCH_SET_GS(0x200000000) -- sel is 0x0 # [OK] GS/BASE remained 0x2b/0x0 # [RUN] ARCH_SET_GS(0), clear gs, then manipulate GSBASE in a different thread # using LDT slot 0 # [OK] GSBASE remained 0 # [RUN] GS = 0x0, GSBASE = 0x0 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x0, GSBASE = 0x1 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x0, GSBASE = 0x200000000 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x0, GSBASE = 0xffffffffffffffff # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x2b, GSBASE = 0x0 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x2b, GSBASE = 0x1 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x2b, GSBASE = 0x200000000 # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [RUN] GS = 0x2b, GSBASE = 0xffffffffffffffff # other thread: ARCH_SET_GS(0x0) -- sel is 0x0 # [OK] Index and base were preserved # [OK] GS remained 0x7 and GSBASE changed to 0xFF ok 34 selftests: x86: fsgsbase_64 # selftests: x86: sysret_rip_64 # [RUN] sigreturn to 0x800000000000 # [OK] Got SIGSEGV at RIP=0x800000000000 # [RUN] sigreturn to 0x1000000000000 # [OK] Got SIGSEGV at RIP=0x1000000000000 # [RUN] sigreturn to 0x2000000000000 # [OK] Got SIGSEGV at RIP=0x2000000000000 # [RUN] sigreturn to 0x4000000000000 # [OK] Got SIGSEGV at RIP=0x4000000000000 # [RUN] sigreturn to 0x8000000000000 # [OK] Got SIGSEGV at RIP=0x8000000000000 # [RUN] sigreturn to 0x10000000000000 # [OK] Got SIGSEGV at RIP=0x10000000000000 # [RUN] sigreturn to 0x20000000000000 # [OK] Got SIGSEGV at RIP=0x20000000000000 # [RUN] sigreturn to 0x40000000000000 # [OK] Got SIGSEGV at RIP=0x40000000000000 # [RUN] sigreturn to 0x80000000000000 # [OK] Got SIGSEGV at RIP=0x80000000000000 # [RUN] sigreturn to 0x100000000000000 # [OK] Got SIGSEGV at RIP=0x100000000000000 # [RUN] sigreturn to 0x200000000000000 # [OK] Got SIGSEGV at RIP=0x200000000000000 # [RUN] sigreturn to 0x400000000000000 # [OK] Got SIGSEGV at RIP=0x400000000000000 # [RUN] sigreturn to 0x800000000000000 # [OK] Got SIGSEGV at RIP=0x800000000000000 # [RUN] sigreturn to 0x1000000000000000 # [OK] Got SIGSEGV at RIP=0x1000000000000000 # [RUN] sigreturn to 0x2000000000000000 # [OK] Got SIGSEGV at RIP=0x2000000000000000 # [RUN] sigreturn to 0x4000000000000000 # [OK] Got SIGSEGV at RIP=0x4000000000000000 # [RUN] sigreturn to 0x8000000000000000 # [OK] Got SIGSEGV at RIP=0x8000000000000000 # [RUN] Trying a SYSCALL that falls through to 0x7fffffffe000 # [OK] We survived # [RUN] Trying a SYSCALL that falls through to 0x7ffffffff000 # [OK] We survived # [RUN] Trying a SYSCALL that falls through to 0x800000000000 # [OK] mremap to 0x7ffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0xfffffffff000 # [OK] mremap to 0xffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x1000000000000 # [OK] mremap to 0xfffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x1fffffffff000 # [OK] mremap to 0x1ffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x2000000000000 # [OK] mremap to 0x1fffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x3fffffffff000 # [OK] mremap to 0x3ffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x4000000000000 # [OK] mremap to 0x3fffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x7fffffffff000 # [OK] mremap to 0x7ffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x8000000000000 # [OK] mremap to 0x7fffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0xffffffffff000 # [OK] mremap to 0xfffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x10000000000000 # [OK] mremap to 0xffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x1ffffffffff000 # [OK] mremap to 0x1fffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x20000000000000 # [OK] mremap to 0x1ffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x3ffffffffff000 # [OK] mremap to 0x3fffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x40000000000000 # [OK] mremap to 0x3ffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x7ffffffffff000 # [OK] mremap to 0x7fffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x80000000000000 # [OK] mremap to 0x7ffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0xfffffffffff000 # [OK] mremap to 0xffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x100000000000000 # [OK] mremap to 0xfffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x1fffffffffff000 # [OK] mremap to 0x1ffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x200000000000000 # [OK] mremap to 0x1fffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x3fffffffffff000 # [OK] mremap to 0x3ffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x400000000000000 # [OK] mremap to 0x3fffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x7fffffffffff000 # [OK] mremap to 0x7ffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x800000000000000 # [OK] mremap to 0x7fffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0xffffffffffff000 # [OK] mremap to 0xfffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x1000000000000000 # [OK] mremap to 0xffffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x1ffffffffffff000 # [OK] mremap to 0x1fffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x2000000000000000 # [OK] mremap to 0x1ffffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x3ffffffffffff000 # [OK] mremap to 0x3fffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x4000000000000000 # [OK] mremap to 0x3ffffffffffff000 failed # [RUN] Trying a SYSCALL that falls through to 0x7ffffffffffff000 # [OK] mremap to 0x7fffffffffffe000 failed # [RUN] Trying a SYSCALL that falls through to 0x8000000000000000 # [OK] mremap to 0x7ffffffffffff000 failed ok 35 selftests: x86: sysret_rip_64 # selftests: x86: syscall_numbering_64 # Checking for x32... not supported # [RUN] Checking syscalls 512-547 # [RUN] Checking some 64-bit syscalls in x32 range # [RUN] Checking numbers above 2^32-1 # [FAIL] syscall 4294967296 succeeded, but it should have failed not ok 36 selftests: x86: syscall_numbering_64 # exit=1 # selftests: x86: ldt_gdt_64 # [NOTE] set_thread_area is available; will use GDT index 12 # [OK] LDT entry 0 has AR 0x0040FB00 and limit 0x0000000A # [OK] LDT entry 0 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00907B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07300 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07100 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07500 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00507700 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507F00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507D00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507B00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [RUN] Test fork # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [OK] LDT entry 1 is invalid # [OK] LDT entry 0 is invalid # [NOTE] set_thread_area is available; will use GDT index 12 # [OK] LDT entry 0 has AR 0x0040FB00 and limit 0x0000000A # [OK] LDT entry 0 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 1 is invalid # [OK] LDT entry 2 has AR 0x00C0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D0FB00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00907B00 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07300 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07100 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00D07500 and limit 0x0000AFFF # [OK] LDT entry 2 has AR 0x00507700 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507F00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507D00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507B00 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [OK] LDT entry 2 has AR 0x00507900 and limit 0x0000000A # [RUN] Test fork # [OK] Child succeeded # [RUN] Test size # [DONE] Size test # [OK] modify_ldt failure 22 # [OK] LDT entry 0 has AR 0x0000F300 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x00007300 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x0000F100 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x00007300 and limit 0x00000000 # [OK] LDT entry 0 has AR 0x00007100 and limit 0x00000001 # [OK] LDT entry 0 has AR 0x00007100 and limit 0x00000000 # [OK] LDT entry 0 is invalid # [OK] LDT entry 0 has AR 0x0040F300 and limit 0x000FFFFF # [OK] LDT entry 0 has AR 0x00C0F300 and limit 0xFFFFFFFF # [OK] LDT entry 0 has AR 0x00C0F100 and limit 0xFFFFFFFF # [OK] LDT entry 0 has AR 0x00C0F700 and limit 0xFFFFFFFF # [OK] LDT entry 0 has AR 0x00C0F500 and limit 0xFFFFFFFF # [OK] LDT entry 0 is invalid # [RUN] Cross-CPU LDT invalidation # [OK] All 5 iterations succeeded # [RUN] Test exec # [OK] LDT entry 0 has AR 0x0040FB00 and limit 0x0000002A # [OK] Child succeeded # [OK] Invalidate DS with set_thread_area: new DS = 0x0 # [OK] Invalidate ES with set_thread_area: new ES = 0x0 # [OK] Invalidate FS with set_thread_area: new FS = 0x0 # [OK] New FSBASE was zero # [OK] Invalidate GS with set_thread_area: new GS = 0x0 # [OK] New GSBASE was zero ok 37 selftests: x86: ldt_gdt_64 # selftests: x86: ptrace_syscall_64 # [RUN] Check int80 return regs # [OK] getpid() preserves regs # [OK] kill(getpid(), SIGUSR1) preserves regs # [RUN] ptrace-induced syscall restart # [RUN] SYSEMU # [OK] Initial nr and args are correct # [RUN] Restart the syscall (ip = 0x7fa9a7fb3f59) # [OK] Restarted nr and args are correct # [RUN] Change nr and args and restart the syscall (ip = 0x7fa9a7fb3f59) # [OK] Replacement nr and args are correct # [OK] Child exited cleanly # [RUN] kernel syscall restart under ptrace # [RUN] SYSCALL # [OK] Initial nr and args are correct # [RUN] SYSCALL # [OK] Args after SIGUSR1 are correct (ax = -514) # [OK] Child got SIGUSR1 # [RUN] Step again # [OK] pause(2) restarted correctly ok 38 selftests: x86: ptrace_syscall_64