linux-kernel - [PATCH 2/2] dt-bindings: gpio: stp: add gphy3 and gphy4 properties

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Message-Id: <20210513210340.10466-2-olek2@wp.pl>
Date:   Thu, 13 May 2021 23:03:40 +0200
From:   Aleksander Jan Bajkowski <olek2@...pl>
To:     linus.walleij@...aro.org, bgolaszewski@...libre.com,
        robh+dt@...nel.org, john@...ozen.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     Aleksander Jan Bajkowski <olek2@...pl>
Subject: [PATCH 2/2] dt-bindings: gpio: stp: add gphy3 and gphy4 properties

The xRX300 family has 3 and the xRX330 has 4 gphs. They can also control
some pins of the gpio cascade. This patch documents the missing properties.

Signed-off-by: Aleksander Jan Bajkowski <olek2@...pl>
---
 .../devicetree/bindings/gpio/gpio-stp-xway.yaml  | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-stp-xway.yaml b/Documentation/devicetree/bindings/gpio/gpio-stp-xway.yaml
index a36acc98898c..beb755edf639 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-stp-xway.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-stp-xway.yaml
@@ -84,6 +84,22 @@ properties:
     minimum: 0x0
     maximum: 0x7
 
+  lantiq,phy3:
+    description:
+      The gphy3 core can control 3 bits of the gpio cascade. Available on
+      the xRX300 and xRX330 family.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0x0
+    maximum: 0x7
+
+  lantiq,phy4:
+    description:
+      The gphy4 core can control 3 bits of the gpio cascade. Available on
+      the xRX330 family.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0x0
+    maximum: 0x7
+
   lantiq,rising:
     description:
       Use rising instead of falling edge for the shift register.
-- 
2.30.2