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Date:   Fri, 14 May 2021 15:53:00 -0700
From:   Andy Lutomirski <luto@...nel.org>
To:     "H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Borislav Petkov <bp@...en8.de>
Cc:     Steve Wahl <steve.wahl@....com>, Mike Travis <mike.travis@....com>,
        Dimitri Sivanich <dimitri.sivanich@....com>,
        Russ Anderson <russ.anderson@....com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/6] x86/traps: add X86_NR_HW_TRAPS to <asm/trapnr.h>

On 5/10/21 5:55 PM, H. Peter Anvin wrote:
> From: "H. Peter Anvin (Intel)" <hpa@...or.com>
> 
> The x86 architecture supports up to 32 trap vectors. Add that constant
> to <asm/trapnr.h>.
> 
> Signed-off-by: H. Peter Anvin (Intel) <hpa@...or.com>
> ---
>  arch/x86/include/asm/trapnr.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/trapnr.h b/arch/x86/include/asm/trapnr.h
> index f5d2325aa0b7..f0baf92da20b 100644
> --- a/arch/x86/include/asm/trapnr.h
> +++ b/arch/x86/include/asm/trapnr.h
> @@ -27,6 +27,7 @@
>  #define X86_TRAP_VE		20	/* Virtualization Exception */
>  #define X86_TRAP_CP		21	/* Control Protection Exception */
>  #define X86_TRAP_VC		29	/* VMM Communication Exception */
> +#define X86_NR_HW_TRAPS		32	/* Max hardware trap number */
>  #define X86_TRAP_IRET		32	/* IRET Exception */
>  
>  #endif
> 

Acked-by: Andy Lutomirski <luto@...nel.org>

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