linux-kernel - Re: [PATCH] x86/i8259: Work around buggy legacy PIC

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Message-ID: <b29b5c28-c36d-9c03-fc1a-055d8a089bcd@zytor.com>
Date:   Fri, 14 May 2021 10:28:30 -0700
From:   "H. Peter Anvin" <hpa@...or.com>
To:     David Laight <David.Laight@...LAB.COM>,
        "'Thomas Gleixner'" <tglx@...utronix.de>,
        Maximilian Luz <luzmaximilian@...il.com>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>
Cc:     Sachi King <nakato@...ato.io>, "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: Re: [PATCH] x86/i8259: Work around buggy legacy PIC

On 5/14/21 9:12 AM, David Laight wrote:
> 
> A more interesting probe would be:
> - Write some value to register 1 - the mask.
> - Write 9 to register zero (selects interrupt in service register).
> - Read register 0 - should be zero since we aren't in as ISR.
> - Read register 1 - should get the mask back.
> You can also write 8 to register 0, reads then return the pending interrupts.
> Their might be pending interrupts - so that value can't be checked.
> 
> But if reads start returning the last written value you might only
> have capacitors on the data bus.

What data bus? These things haven't been on a physical parallel bus for 
ages.

> The required initialisation registers are pretty fixed for the PC hardware.
> But finding the values requires a bit of work.
> 
> 	David

And you always risk activating new bugs.

Since this appears to be a specific platform advertising the wrong 
answer in firmware, this is better handled as a quirk.

	-hpa