[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210517171205.1581938-3-abelvesa@kernel.org>
Date: Mon, 17 May 2021 20:12:00 +0300
From: abelvesa@...nel.org
To: Rob Herring <robh@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Jacky Bai <ping.bai@....com>,
Dong Aisheng <aisheng.dong@....com>
Cc: NXP Linux Team <linux-imx@....com>, devicetree@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-arm-kernel@...ts.infradead.org, Abel Vesa <abel.vesa@....com>
Subject: [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox
From: Abel Vesa <abel.vesa@....com>
The mailbox of the lsio mu5a is used by rpmsg on imx8qxp and
imx8dxl platforms.
Signed-off-by: Abel Vesa <abel.vesa@....com>
---
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index ee4e585a9c39..8e3c92c82fac 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -141,6 +141,15 @@ lsio_mu4: mailbox@...f0000 {
status = "disabled";
};
+ lsio_mu5: mailbox@...00000 {
+ compatible = "fsl,imx6sx-mu";
+ reg = <0x5d200000 0x10000>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <2>;
+ power-domains = <&pd IMX_SC_R_MU_5A>;
+ };
+
+
lsio_mu13: mailbox@...80000 {
reg = <0x5d280000 0x10000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
--
2.31.1
Powered by blists - more mailing lists