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Message-Id: <1621284311.383362.3157708.nullmailer@robh.at.kernel.org>
Date:   Mon, 17 May 2021 15:45:11 -0500
From:   Rob Herring <robh@...nel.org>
To:     Sudeep Holla <sudeep.holla@....com>
Cc:     Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Hector Yuan <hector.yuan@...iatek.com>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v4] dt-bindings: dvfs: Add support for generic performance domains

On Mon, 17 May 2021 16:54:58 +0100, Sudeep Holla wrote:
> The CLKSCREW attack [0] exposed security vulnerabilities in energy management
> implementations where untrusted software had direct access to clock and
> voltage hardware controls. In this attack, the malicious software was able to
> place the platform into unsafe overclocked or undervolted configurations. Such
> configurations then enabled the injection of predictable faults to reveal
> secrets.
> 
> Many Arm-based systems used to or still use voltage regulator and clock
> frameworks in the kernel. These frameworks allow callers to independently
> manipulate frequency and voltage settings. Such implementations can render
> systems susceptible to this form of attack.
> 
> Attacks such as CLKSCREW are now being mitigated by not having direct and
> independent control of clock and voltage in the kernel and moving that
> control to a trusted entity, such as the SCP firmware or secure world
> firmware/software which are to perform sanity checking on the requested
> performance levels, thereby preventing any attempted malicious programming.
> 
> With the advent of such an abstraction, there is a need to replace the
> generic clock and regulator bindings used by such devices with a generic
> performance domains bindings.
> 
> [0] https://www.usenix.org/conference/usenixsecurity17/technical-sessions/presentation/tang
> 
> Link: https://lore.kernel.org/r/20201116181356.804590-1-sudeep.holla@arm.com
> Cc: Rob Herring <robh+dt@...nel.org>
> Acked-by: Viresh Kumar <viresh.kumar@...aro.org>
> Signed-off-by: Sudeep Holla <sudeep.holla@....com>
> ---
> Hi All,
> 
> Sorry for yet another delay, I don't want to mist this for v5.14 as Mediatek
> cpufreq driver was depending on this IIRC.
> 
> v3[3]->v4:
> 	- Dropped unnecessary phandle-array reference
> 	- Added maxItems = 1 for the property
> 
> v2[2]->v3[3]:
> 	- Dropped required properties
> 	- Added non cpu device example
> 	- Updated cpu bindings too
> 
> v1[1]->v2[2]:
> 	- Changed to Dual License
> 	- Added select: true, enum for #performance-domain-cells and
> 	  $ref for performance-domain
> 	- Changed the example to use real existing compatibles instead
> 	  of made-up ones
> 
> Regards,
> Sudeep
> 
> [1] https://lore.kernel.org/r/20201105173539.1426301-1-sudeep.holla@arm.com
> [2] https://lore.kernel.org/r/20201116181356.804590-1-sudeep.holla@arm.com
> [3] https://lore.kernel.org/r/20210407135913.2067694-1-sudeep.holla@arm.com
> 
>  .../devicetree/bindings/arm/cpus.yaml         |  7 ++
>  .../bindings/dvfs/performance-domain.yaml     | 74 +++++++++++++++++++
>  2 files changed, 81 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/dvfs/performance-domain.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml:0:0: /example-0/performance-controller@...40000: failed to match any schema with compatible: ['qcom,cpufreq-hw']

See https://patchwork.ozlabs.org/patch/1479615

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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