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Message-ID: <7A439233-C5FF-4BCA-8A5C-945EB847F487@aspeedtech.com>
Date:   Mon, 17 May 2021 02:53:44 +0000
From:   Billy Tsai <billy_tsai@...eedtech.com>
To:     Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>
CC:     "lee.jones@...aro.org" <lee.jones@...aro.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "joel@....id.au" <joel@....id.au>,
        "andrew@...id.au" <andrew@...id.au>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-pwm@...r.kernel.org" <linux-pwm@...r.kernel.org>,
        BMC-SW <BMC-SW@...eedtech.com>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>
Subject: Re: [v5 2/2] pwm: Add Aspeed ast2600 PWM support

Hello,

On 2021/5/15, 11:57 PM,Uwe Kleine-Königwrote:

	>	> +	div_h = DIV_ROUND_DOWN_ULL(div_h,
	>	> +				   (FIELD_MAX(PWM_ASPEED_CTRL_CLK_DIV_L) + 1));
	>	> +	div_h = DIV_ROUND_DOWN_ULL(div_h, NSEC_PER_SEC);

	> As a division is an expensive operation you can better first multiply
	> NSEC_PER_SEC and FIELD_MAX(PWM_ASPEED_CTRL_CLK_DIV_L) + 1 and divide by
	> the result.

When I multiply NSEC_PER_SEC and FIELD_MAX(PWM_ASPEED_CTRL_CLK_DIV_L) + 1 the result will overflow
for 32-bits and the divisor type of do_div is 32-bits so I need to do div twice to avoid the issue.
Can you give me some suggests?

Thanks

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