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Message-Id: <20210518165658.12764-3-jbx6244@gmail.com>
Date: Tue, 18 May 2021 18:56:56 +0200
From: Johan Jonker <jbx6244@...il.com>
To: heiko@...ech.de
Cc: robh+dt@...nel.org, kishon@...com, vkoul@...nel.org,
linux-phy@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v6 2/4] dt-bindings: phy: rename phy nodename in phy-rockchip-inno-usb2.yaml
The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$"
in phy-provider.yaml has required "#phy-cells" for phy nodes.
The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes.
Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent
notifications. Remove unneeded "#phy-cells" from parent node.
Also sort example.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@...il.com>
---
.../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml | 11 +++--------
Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 4 ++--
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index fb29ad807..fbe860fff 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -29,9 +29,6 @@ properties:
"#clock-cells":
const: 0
- "#phy-cells":
- const: 0
-
clocks:
maxItems: 1
@@ -119,7 +116,6 @@ required:
- reg
- clock-output-names
- "#clock-cells"
- - "#phy-cells"
- host-port
- otg-port
@@ -130,26 +126,25 @@ examples:
#include <dt-bindings/clock/rk3399-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
- u2phy0: usb2-phy@...0 {
+ u2phy0: usb2phy@...0 {
compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>;
clocks = <&cru SCLK_USB2PHY0_REF>;
clock-names = "phyclk";
clock-output-names = "clk_usbphy0_480m";
#clock-cells = <0>;
- #phy-cells = <0>;
u2phy0_host: host-port {
- #phy-cells = <0>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "linestate";
+ #phy-cells = <0>;
};
u2phy0_otg: otg-port {
- #phy-cells = <0>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "otg-bvalid", "otg-id", "linestate";
+ #phy-cells = <0>;
};
};
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index 84bdaf88d..43c288708 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -184,7 +184,7 @@ allOf:
- "#size-cells"
patternProperties:
- "usb2-phy@[0-9a-f]+$":
+ "usb2phy@[0-9a-f]+$":
type: object
$ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#"
@@ -233,7 +233,7 @@ examples:
#phy-cells = <0>;
};
- u2phy0: usb2-phy@...0 {
+ u2phy0: usb2phy@...0 {
compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>;
clocks = <&cru SCLK_USB2PHY0_REF>;
--
2.11.0
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